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PA Workshop Instruction

cadence PA design workshop

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0% found this document useful (0 votes)
554 views77 pages

PA Workshop Instruction

cadence PA design workshop

Uploaded by

woshisimox
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 77

PA Design Using SpectreRF

________________________________________________________________________

SpectreRF Workshop
Power Amplifier Design Using SpectreRF
MMSIM6.0USR2

November 2005

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Contents
Power Amplifier Design Measurements ............................................................................. 3
Purpose............................................................................................................................ 3
Audience ......................................................................................................................... 3
Overview......................................................................................................................... 3
Introduction to Power Amplifiers ....................................................................................... 3
The Design Example........................................................................................................... 4
Three testbenches for PA measurements ........................................................................ 5
Example Measurements Using SpectreRF.......................................................................... 6
Lab1: Power Related Measurement (Swept PSS)........................................................... 6
Lab2: Linearity Measurement (Swept PSS with PAC)................................................. 18
Lab3: Stability and S-Parameter Measurements (PSS and PSP) .................................. 27
Lab4. Large Signal S-Parameter Measurement (LSSP wizard).................................... 39
Lab5: Load-Pull Measurements (Swept PSS)............................................................... 46
Lab6: Envelope Following Analysis (ENVLP and ACPR Wizard) ............................. 57
Using the ACPR Wizard..................................................................................... 71
Conclusion ........................................................................................................................ 77
Reference .......................................................................................................................... 77

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Power Amplifier Design Measurements

The procedures described in this workshop are deliberately broad and generic. Your
specific design might require procedures that are slightly different from those described
here.

Purpose
This workshop describes how to use SpectreRF in the Analog Design Environment to
measure parameters which are important in design verification of Power Amplifiers, or
PAs. New features of MMSIM6.0USR2 are included.

Audience
Users of SpectreRF in the Analog Design Environment.

Overview
This application note describes a basic set of the most useful measurements for PAs.

Introduction to Power Amplifiers


Power amplifiers, or PAs, are a part of the transmitter front-end used to amplify the
transmitted signal so the signal can be received and decoded within a fixed geographical
area. The main PA performance parameter is the output power level the PA can achieve,
depending on the targeted application, linearity, and efficiency.
Power amplifiers can be categorized several ways depending on whether they are
broadband or narrowband, and whether they are intended for linear operation (Class A, B,
AB and C) or constant-envelope operation (Class D, E and F). This application note
focuses on the design of narrowband and linear PAs.

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The Design Example


The PA measurements described in this workshop are calculated using SpectreRF in the
Analog Design Environment. The design example used to conduct the measurements
described in this workshop is a two-stage power amplifier namely, EF_PA_istg and
EF_PA_ostg as shown below:

The supply voltage is 5 V. There is a simple output matching network in the subcircuit
EF_PA_ostg. The power amplifier is designed to be driven by CDMA I/Q channel
baseband signals, modulated using QPSK schemes with a carrier frequency of 1 GHz.
Typical PA performance metrics as listed in following table:
Measurement

Acceptable Value

Output Power

+20 to +30 dBm

Efficiency

30% to 60%

Supply Voltage

2.8 to 5.8 V

Gain

20 to 30 dB

Harmonic Output (2f, 3f ,4f)

-30 to -50 dBc

Stability Factor

>1

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Three testbenches for PA measurements


Testbench One
The first testbench is the PA driven by sinusoidal sources. Use this testbench to make the
general measurements, which include

Power related measurements (input power, output power, supply voltage, supply
current, power gain and power dissipation)

Efficiency measurements (drain efficiency and power added efficiency)

Linearity measurements (1 dB compression point, IIP3 and OIP3)

Noise measurements (NF or F)

Stability measurements (K-factors, B1f and S-parameter)

Large signal S-Parameter measurements.

Use the Periodic Steady State (PSS) analysis followed by the Periodic Small Signal
(PAC/PSP/PNOISE) analyses to make these measurements. (See Lab1 to Lab4 from page
6 to page 45 for details.)
Testbench Two
The second testbench is the PA driven by a sinusoidal source with a port adapter added at
the output power amplifier. Use this testbench to generate

Load-pull contours

Reflection contours

Use the swept PSS analysis combined with the parametric analysis tools to measure load
pull. (See Lab5 on page 46 for details)
Testbench Three
The third testbench is the PA driven by modulation signals. It is used to generate

ACPR plots

Input and output trajectory plots

Use the Envelope Following (envlp) analysis to make these measurements. (See Lab6 on
page 55 for details).

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Example Measurements Using SpectreRF


To achieve optimal circuit performance, you should measure and evaluate several PA
characteristics or parameters under varying conditions. The most important trade-off in
PA design is between efficiency and linearity.

Well begin our examination of the flow by bringing up the Cadence Design Framework
II environment and look at a full view of our reference design:
Change directory to
Action:

cd to ./paSimple directory

Action:

Invoke tool icfb&

Action:

In the CIW window, select Tools->Library Manager

Lab1: Power Related Measurement (Swept PSS)


Power related measurements include input power, output power, supply voltage, supply
current, power gain and power dissipation. To make these measurements, use a swept
PSS analysis to sweep the input power level.
Action1-1:

Open the schematic view of the design EF_example_simple in the library


RFworkshop

Action1-2:

Select the PORT1 source. Use the EditPropertiesObjects command


to ensure that the port properties are set as described below:

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Action1-3:

Parameter

Value

Resistance

50 ohm

Port Number

DC voltage

(blank)

Source type

sine

Frequency name 1

RF

Frequency 1

fin

Amplitude 1 (dBm)

pin

Select the PORT2 source. Use the EditPropertiesObjects command


to ensure that the port properties are set as described below:
Parameter

Value

Resistance

50 ohm

Port Number

DC voltage

(blank)

Source type

dc

Action1-4:

Check and save the schematic.

Action1-5:

In the Virtuoso Schematic Editing window, select Tools->Analog


Environment

Action1-6:

You can choose SessionLoad State in Virtuoso Analog Design


Environment load state Lab1_Power_PSS, then skip to Action1-12 or

Action1-7:

In Analog Design Environment window, select Analyses->Choose

Action1-8:

In the Choosing Analyses window, select the pss button in the Analysis
field of the window. Configure the form as follows:

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Action1-9:

Make sure that the Enabled button is on. Click OK in the Choosing
Analyses form.

Action1-10:

In the Virtuosos Analog Design Environment window, Choose


OutputsTo be SavedSelect on Schematic

Action1-11:

In the schematic, select the positive terminals of PORT2, PORT1 and


VCC. Press ESC key to escape the selection process.

Now your Virtuoso Analog Design Environment looks like this:

Action1-12:

Choose SimulationNetlist and Run to start the simulation or click on


the netlist and Run icon in the Virtuoso Analog Design Environment
window.

After the simulation has finished, plot the simulation results.


Action1-13:

In the Virtuoso Analog Design Environment window, choose Results


Direct PlotMain Form

The Direct Plot form appears.


Action1-14:

In Direct Plot Form window, choose pss as the Analysis type. Choose
Power in Function field. Choose 1G in the Output harmonic list box.

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Action1-15:

Select Port2 on the schematic. The waveform window shows the ouput
power VS input power..

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For the design example given, when the input power level is -5 dBm, the output power
level is close to 20 dBm. Thus, -5 dBm is assumed to be the normal operating condition.
All subsequent plots are based on this assumption.
Action1-16:

In the Direct Plot form, change the Plot Mode to replace and configure the
form as follows:

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Action1-17:

Click on Port2 to show the Power Spectrum.

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Action1-18:

In the Direct Plot form, click Power Gain in the function field and
configure the form as follows:

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Action1-19:

In the schematic, click the positive and negative terminals of Port2, and
then click the positive and negative terminals of VCC.
The following plot shows the drain efficiency of the PA.

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Action1-20:

In the waveform window, click the Add Subwindow icon.

SpectreRF provides a Power Added Efficiency (PAE) function. You only need to select
the output terminal, input terminal and DC terminal in turn to plot the power added
efficiency versus the input power level.
Action1-21:

In the Direct Plot form, In the Direct Plot form, set the Plotting Mode to
Append. Select Power Added Eff. in the Function field. Select the
Output harmonic as 1GHz.

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Action1-22:

In the schematic, select the positive terminals of PORT2, PORT1 and


VCC in turn..

The waveform window updates.

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Notice that for PA with high gain, the PAE is nearly equal to the drain efficiency.
You will find that the efficiency of the PA around nominal operating conditions is only
close to 20%.
Action1-23:

Close the waveform window, the Direct Plot form and Virtuoso Analog
Design Environment window.

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Lab2: Linearity Measurement (Swept PSS with PAC)


1 dB compression point is defined as the input signal level that causes the small signal
gain to drop by 1 dB. The suggested approach to measure 1 dB compression point is to
set up a swept PSS analysis that sweeps input power level.
When the circuit is driven by two RF tones ( f in and f in 2 ), the third order intercept point
is the intercept point of the first order fundamental power term ( f in , f in 2 ) and the third
order intermodulation power term ( 2 f in f in 2 , 2 f in 2 f in ) expressed in some decibel
form.
There are at least four ways to measure IIP3/OIP3 using SpectreRF:
1. PSS analysis with two large tones
2. QPSS analysis with one large tone and one moderate tone
3. Swept PSS and PAC analyses
4. Rapid IP3 using AC or PAC analysis
The recommended approach is to use method 3, swept PSS followed by PAC analyses, as
this is faster and more accurate.
Action2-1:

If not already open, Open the schematic view of the design


EF_example_simple in the library RFworkshop

Action2-2:

Select the PORT1 source. Use the EditPropertiesObjects command


to ensure that the port properties are set as described below:
Parameter

Value

Resistance

50 ohm

Port Number

DC voltage

(blank)

Source type

sine

Frequency name 1

RF

Frequency 1

fin

Amplitude 1 (dBm)

pin

PAC magnitude (dBm)

pin

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Action2-3:

Check and save the schematic.

Action2-4:

From the EF_example_simple schematic, start the Virtuoso Analog


Design Environment with the ToolsAnalog Environment command.

Action2-5:

You can choose SessionLoad State, load state Lab2_IP3_PSSPAC


and skip to Action2-12 or

Action2-6:

In Vituoso Analog Design Environment, choose AnalysesChoose

Action2-7:

In the Choosing Analyses window, select the pss button in the Analysis
field of the window.

Action2-8:

Set up a swept PSS analysis as follows:

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Action2-9:

Make sure the Enabled button is active, and click Apply in the Choosing
Analyses form.

Action2-10:

In the Choosing Analyses window, select the pac button in the Analysis
field of the window. Configure the form as follows:

Action2-11:

Make sure the Enabled button is active, and click OK in the Choosing
Analyses form

Your Virtuoso Analog Environment will look like this:

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Action2-12:

In your Analog Design Environment, Choose SimulationNetlist and


Run or click the Netlist and Run icon to start the simulation.

When the simulation ends, plot the P1dB and IP3 curves.
Action2-13:

In the Virtuoso Analog Design Environment, Choose ResultsDirect


PlotMain Form.

Action2-14:

In the Direct Plot Form, select the pss button and configure the form like
this:

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Action2-15:

Click the PORT2 to plot the 1 dB compression point.

The output referred 1dB compression point is more meaningful for PA design, which is
18.9dBm in this case.
Action2-16:

In the Direct Plot Form, select the pac button and configure the form like
this:

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Action2-17:

Click the PORT2 to plot the Output Referred IP3.

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Action2-18:

Close the waveform window. Click Cancel on the Direct Plot form. Close
the Virtuoso Analog Design Environment window.

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Lab3: Stability and S-Parameter Measurements (PSS and PSP)


As pointed out by Gonzalez in [4], stability is guaranteed for the following conditions
Kf >1, <1
Kf > 1, B1 f = 1 + S11 S 22 2 >0
2

To analyze stability for a PA, set up PSS and PSP analyses. The PSP analysis is a
periodic small-signal analysis, so the S-parameter and VSWR results it generates apply
only to the small signal. In some PA data sheets, the S-parameter and VSWR values
specified are large signal characteristics. SpectreRF currently support large signal SP
(LSSP) analysis. The LSSP analysis will show in Lab4.
Action3-1:

If not already open, Open the schematic view of the design


EF_example_simple in the library RFworkshop

Action3-2:

Select the PORT1 source. Use the EditPropertiesObjects command


to ensure that the port properties are set as described below:
Parameter

Value

Resistance

50 ohm

Port Number

DC voltage

(blank)

Source type

sine

Frequency name 1

RF

Frequency 1

fin

Amplitude 1 (dBm)

pin

Action3-3:

From the EF_example_simple schematic, start the Virtuoso Analog


Design Environment with the ToolsAnalog Environment command.

Action3-4:

You can choose SessionLoad State, load state Lab3_Stability_PSP


and skip to Action3-10 or

Action3-5:

In Vituoso Analog Design Environment, choose AnalysesChoose

Action3-6:

In the Choosing Analyses window, select the pss button in the Analysis
field of the window and set up the form as follows:

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Action3-7:

Make sure the Enabled button is active, and click Apply Choosing
Analyses form.

Action3-8:

In the Choosing Analyses window, select the psp button in the Analysis
field of the window and set up the form as follows:

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Action3-9:

Make sure the Enabled button is active, and click OK. The Choosing
Analyses form.

Your Virtuoso Analog Environment will look like this:

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Action3-10:

In your Analog Design Environment, Choose SimulationNetlist and


Run or click the Netlist and Run icon to start the simulation.

Action3-11:

In the Virtuoso Analog Design Environment, Choose ResultsDirect


PlotMain Form.

Action3-12:

In the Direct Plot Form, select the psp button, Click Kf in the Function
field. The form should look like this:

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Action3-13:

Click the Plot button. The following plot will show up.

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Action3-14:

In the Direct Plot Form, select the psp button, Click B1f in the Function
field. The form should look like this:

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Action3-16:

Click the Plot button. The following plot will show up.

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Action1-17:

Close the waveform window.

Action1-18:

In Direct Plot Form window, set Plotting Mode to Append. In the


Analysis field, select psp. In the Function field, select SP. In the Plot
Type field, select Rectangular. In the Modifier field, select dB20. The
form should look like

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Action1-19:

Hit the S11, S12, S21 and S22 button.

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Action1-20:

Close the waveform window.

Action1-21:

In Direct Plot Form window, set Plotting Mode to Append. In the


Analysis field, select psp. In the Function field, select SP. In the Plot
Type field, select Z-Smith.

Action1-22:

Click on S11. A waveform window appears.

Action1-23:

In the waveform window, click on the New Subwindow button.

Action1-24:

In the Direct Plot form, click on S22.

You plot the S11 and S22 in the Smith Chart.

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Action1-25:

In the Direct Plot Form window, in the function field, and choose VSWR
(Voltage standing-wave ratio). In the Modifier field, select dB20. Press
on VSWR1, then VSWR2.

You should get the following waveforms:

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Action3-26:

Close the waveform window. Click Cancel on the Direct Plot form. Close
the Virtuoso Analog Design Environment window.

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Lab4. Large Signal S-Parameter Measurement (LSSP wizard)


The small-signal S-parameter characterization of an RF circuit is well established.
However, for circuits with either large nonlinearity or frequency translations, small-signal
S-parameters are not sufficient for design purposes. This is especially true for designs
such as those that use power amplifiers and mixers.
As a natural extension of small-signal S-parameters, large-signal S-parameters can also
be defined as the ratio of reflected (or transmitted) waves to incident waves. Since smallsignal S-parameters are based on the simulation of a linearized circuit, small-signal Sparameters are independent of input power.
Large-signal S-parameters are based on large-signal steady state simulation techniques
such as SpectreRFs PSS analysis with its shooting Newton method or harmonic balance
simulators. Large-signal S-parameters are sensitive to input power levels.
Action4-1:

If not already open, open the schematic view of the design


EF_example_LSSP in the library RFworkshop

Action4-2:

Select the PORT1 source. Use the EditPropertiesObjects command


to ensure that the port properties are set as described below:

Action4-3:

Parameter

Value

Resistance

50 ohm

Port Number

DC voltage

(blank)

Source type

sine

Frequency name 1

RF

Frequency 1

fin

Amplitude 1 (dBm)

pin

Select the PORT2 source. Use the EditPropertiesObjects command


to ensure that the port properties are set as described below:
Parameter

Value

Resistance

50 ohm

Port Number

DC voltage

(blank)

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Source type

sine

Frequency name 1

RFout

Frequency 1

fout

Amplitude 1 (dBm)

pout

Make sure you are using PORT. SpectreRF currently only support PORT for LSSP
simulation.
Action4-4:

Check and save the schematic.

Action4-5:

From the EF_example_simple schematic, start the Virtuoso Analog


Design Environment with the ToolsAnalog Environment command.

Action4-6:

In Vituoso Analog Design Environment, choose ToolsRF---Wizards-LSSP

Action4-7:

In the Large Signal S-Parameter Wizard window, select Port1 in the field
of Define Input/Output.

Action4-8:

Change Type to Input.

Action4-9:

Select Port2 and change type to Output.

Action4-10:

In the Large Signal S-Parameter Wizard window, choose Amplitude in


Sweep field.

Action4-11:

Configure the forms as follows:

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Action4-12:

In the Large Signal S-Parameter Wizard window, click OK to close the


window.

Your Virtuoso Analog Environment will look like this:

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Action4-13:

In your Analog Design Environment, Choose SimulationNetlist and


Run or click the Netlist and Run icon to start the simulation.

After the simulation ends, the waveform window appears.

Action4-14:

In the waveform window, place a marker in curve mag(S21) at Pin=-5


dBm by choosing MarkerPlaceTrace marker. It shows that
S21=23.26dB at Pin=-5 dBm.

Action4-15:

In Virtuoso Analog Design Environment window, choose Variable


Edit. Editing Design Variable window appears.

Action4-16:

In the Editing Design Variable window, click on pin -10, change it value
to -5. Click on Change.

Action4-17:

In the Editing Design Variable window, click on pout 10, change it value
to 18.26. Click on Change.

The PA output will be -5+23.26=18.26 dBm when pin=5dBm.


Action4-18:

Click on OK in the Editing Design Variable window.

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Action4-19:

In Vituoso Analog Design Environment, choose ToolsRF---Wizards-LSSP

Action4-20:

Configure the Large Signal S-Parameter Wizard form as follows:

Action4-21:

In the Large Signal S-Parameter Wizard window, click OK to close the


window.

Your Virtuoso Analog Environment will look like this:

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Action4-22:

In your Analog Design Environment, Choose SimulationNetlist and


Run or click the Netlist and Run icon to start the simulation

After the simulation ends, the waveform window appears.


Note: You may want to change the graph to strip mode to get individual gragh I each
subwindow if the strip mode is not set by default.

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Action4-23:

Close the waveform window. Click Cancel on the Direct Plot form. Close
the Virtuoso Analog Design Environment window. Close the
EF_example_LSSP schematic.

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Lab5: Load-Pull Measurements (Swept PSS)


A load pull analysis is a systematic way to measure large signal impedance matching. In
a load pull analysis, the output reflection coefficients are swept; SpectreRF measures the
output power and plots it as a function of the complex load as seen by the transistor.
Since the complex load requires two axes, the results are plotted as constant power
contours on a Smith chart. The contours show how the output power increases as the load
impedance reaches its optimum value, Zopt.
Keep in mind that you are sweeping output reflection coefficients by changing a linear
load. The large signal output reflection coefficients computed in this manner equal the
small-signal, or incrementally computed, load reflection coefficients. However, for input
reflection coefficients this is no longer true. Actually, you are computing the large signal
reflection coefficients at the fundamental frequency.
You might not always be able to achieve the optimal output power due to other design
goals such as stability concerns for instance. Those goals are generally posed as
constraints in the reflection coefficients. SpectreRF allows you to overlay the reflection
coefficients on top of the constant power contours and make your design choices.
However, a constant power contour does not equal a constant power gain contour. You
should plot the input power contours both to verify that the PAs input impedance does
not change significantly as the load impedance changes and to ensure that you have
achieved a reasonable power gain.
Action5-1:

Open the schematic view of the design EF_example_loadpull in the


library RFworkshop

The following figure shows the modified EF_sxample-simple schematic for frequency
pull calculations.

The input port in the above testbench has the following parameters:

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Parameter

Value

Resistance

50 ohm

Port Number

DC voltage

(blank)

Source type

sine

Frequency name 1

RF

Frequency 1

fin

Amplitude 1 (dBm)

pin

The output port has the setup as below:


Parameter

Value

Resistance

50 ohm

Port Number

DC voltage

(blank)

Source type

dc

An instance of a PortAdaptor is connected to the load. The PortAdaptor is set to have the
following properties:

Frequency = 1.115 G;
Phase of Gamma = theta;
Mag of Gamma = 0.2512
Reference Resistance = 10K (this value must equal to the load).

Action5-2:

From the EF_sxample-loadpull schematic, start the Virtuoso Analog


Design Environment with the ToolsAnalog Environment command.

Action5-3:

You can choose SessionLoad State, load state Lab5_LoadPull_PSS


and skip to Action5-10 or

Action5-4:

In Vituoso Analog Design Environment, choose AnalysesChoose

Action5-5:

In the Choosing Analyses window, select the pss button in the Analysis
field of the window.

Action5-6:

Set up a swept PSS analysis with the theta parameter varying from 0 to
359 degrees. Set Beat Frequency = 1G; Number of Harmonics = 10;
errpreset = moderate; enable the Sweep button; enter theta as Variable

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Name; set the Sweep Range Start = 0 and Stop = 359; set Sweep Type =
linear; and Number of Steps = 10.
Your PSS analysis window should look like

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Action5-7:

Make sure the Enabled button is active, and click OK in the Choosing
Analyses form.

Action5-8:

In the Virtuosos Analog Design Environment window, Choose


OutputsTo be SavedSelect on Schematic

Action5-9:

In the schematic, select the input terminals of PORT1 and


portAdapter. Press ESC key to escape the selection process.

Your Virtuoso Analog Environment will look like this:

Action5-10:

In your Virtuoso Analog Design Environment window, click Tools


Parametric Analysis

The Parametric analysis form appears. Configure the form as below:

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Action5-11:

In your Parametric Analysis form, choose AnalysisStart

Action5-12:

In the Virtuoso Analog Design Environment, select SessionOptions,


change the Waveform Tool to AWD.

Action5-13:

After the simulation has run, in the Virtuoso Analog Design Environment,
Choose ResultsDirect PlotMain Form.

Action5-14:

In the Direct Plot Form, select the pss button, choose the Power Contours
function. Make sure Select is toggled to Single Power/Refl Terminal,
select fundamental (harmonic 1) as the output harmonic. . The form
should look like this:

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Action5-15:

In the schematic window, select the portAdapter input terminal. If you


want, click the Close contours button. The plot shows the contours of
constant output power. The X at the center of the contours marks the
optimal output power and its corresponding normalized impedance, Zopt.

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The small X appears at the maximum power point, which in this case lies near the center
of the smallest constant power contour.

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If you place the cursor on the X, you can read the following information across the top of
the Waveform window.
Real: 6.6376 Imag: -377.21m Freq: -360 p=718.768u; Constant Power Contours
This indicates that a normalized load impedance of about 6.64-j0.38 dissipates the most
power.
You might want to maximize load power subject to a constraint on the magnitude of the
amplifiers input reflection coefficient. Such a constraint can prevent unstable
interactions with the preceding stage.
You can overlay load-pull contours with contours of constant input reflection coefficient
magnitude. The optimal load corresponds to the reflection coefficient that lies on the
largest power load-pull contour and also lies on a constant input reflection coefficient

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contour that is within the constraint. Here, largest power means the contour
corresponding to the largest amount of power delivered to the load.
Action5-16:

In the PSS Direct Plot form, choose the Reflection Contours function,
then toggle select to Separate Refl and RefRefl Terminals. Select the
PAs input port (PORT1) first, and then select the portAdapter input
terminal. You are plotting the constant input reflection contours in the
Smith chart of the output reflection coefficients.

The Direct Plot form should look like this:

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Here shows the constant input reflection coefficients contours overplaying on top of the
output power contour:

Action5-17:

Changed the plot mode to replace, choose the Power Contours


function, and select the terminal of the input port to plot the input power
contour. If the contour shows that the input power does not vary
significantly over the output reflection coefficient sweep, then the constant
power contour is very close to the constant gain contour.

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Action5-18:

Close the waveform window. Click Cancel on the Direct Plot form. Close
the Virtuoso Analog Design Environment window.

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Lab6: Envelope Following Analysis (ENVLP and ACPR Wizard)


The envlp analysis is designed to generate an efficient and accurate prediction of the
envelope transient response of circuits to different modulation schemes. The circuits are
generally clocked at a frequency with a period that is orders of magnitude smaller than
the baseband modulation signal. A classical transient approach is too expensive, and
neither PSS nor QPSS work because the modulation signal is neither periodic nor quasiperiodic.
Envelope following analysis reduces simulation time without compromising accuracy by
exploiting the behavior of circuits to a fixed high frequency clock. In particular, the
envelope of the high-frequency clock can be followed by accurately computing the circuit
behavior over occasional cycles. This accurately captures the fast transient behavior. The
slow varying modulation cycle is accurately followed by a piecewise polynomial.
To do envlp analysis, you can use either shooting engine or Flexible Balance engine. This
lab shows you how to use the Virtuoso Spectre RF Envelope with Flexible Balance
engine to design and analyze transmitters.
Action6-1:

Open the schematic view of the design EF_example_envlp in the library


RFworkshop

The power amplifier is driven by modulation signals. CDMA I/Q baseband chip streams
are fed into an ideal QPSK modulator.

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Action6-2:

View the object properties on PORT0 and PORT1. Note that the PWL file
name for PORT0 is set to cdma_2ms_idata, and the PWL file name for
PORT1 is set to cdma_2ms_qdata.

Action6-3:

Check and save the schematic.

Action6-4:

From the schematic window, start the Virtuoso Analog Design


Environment with the ToolsAnalog Environment command.

Action6-5:
You can choose SessionLoad State, load state
Lab6_ENVLP_FB and skip to Action6-12 or
Action6-6:

In the Virtuoso Analog Design Environment window, click the


Choose Analyses icon. The Choosing Analyses form appears.

Action6-7:

Select the envlp analysis and choose the Flexible Balance engine. Set the
Clock Name to fff, the Stop Time to 150u, and the Number of harmonics
to 3. 3 harmonic is enough for this case. If the circuit is strongly
nonlinear, you should choose more harmonics. If the circuit has square
carrier, for some cases, 9 is acceptable, for some cases 20 or more should
be used.

Action6-8:

Set the Accuracy Defaults (errpreset) field to moderate.

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Action6-9:

Click the Options button at the bottom of the Choosing Analyses form.

The Envelope Following Options form appears.


Action6-10:

Under SIMULATION BANDWIDTH PARAMETERS, set modulationbw to 1M


(Hz) for this simulation.

Action6-11:

Click OK in the Envelope Following Options form and then OK in the


Choosing Analyses form.

The Virtuoso Analog Design Environment window should look like this:

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Action6-12:
.
Action6-13:

Action6-14:

In your Analog Design Environment, Choose SimulationNetlist and


Run or click the Netlist and Run icon to start the simulation.
In the Virtuoso Analog Design Environment window, choose Results
Direct PlotMain Form.
Select Voltage for Function. Select time for Sweep.

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Action6-15:

In the schematic window, click on the RFOUT net.

The voltage waveform appears in the Waveform window.

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Action6-16:
Max

In the Waveform window, double click on X-axis and set the Min and
values as shown below.

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The Waveform window appears as follows.

The plot displays a number of vertical lines with a wavy line running through them. The
vertical lines are the points at which detailed calculations are performed and the wavy
line connects these points. The simulation runs much faster than a Virtuoso Spectre
Transient Analysis simulation because Envelope Following skips carrier cycles when it
can do so and still satisfy numerical tolerances.
Action6-17:

To get a closer look, zoom in on any one of the vertical lines.


You can now see the detailed simulation for one complete cycle.

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The modulation riding on the RF carrier is the baseband signal, the information to be
transmitted. The baseband signal determines the amplitude and phase of the RF carrier. It
is important to determine how the transmitter might alter the baseband signal. You can
extract the baseband signal at any point in the design.
Action6-18:

In the Direct Plot form, set these options:


a. Select Replace for Plot Mode.
b. Select Voltage for Function.
c. Select harmonic time for Sweep.
d. Select Real for Modifier.
e. Select 1 for Harmonic Number.

Action6-19:

In the schematic, click on the adder output.

A plot for the real portion appears in the Waveform window.


Action6-20:

In the Direct Plot form, select Append for Plot Mode and Imaginary for
Modifier.

Action6-21:

In the schematic, click on the adder output.

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A plot for the imaginary portion is added to the Waveform window.
Action6-22:

In your waveform window, click on the Strip Chart Mode icon

Action6-23:

Set your X Axis to 45u to 57u, you can see both the real and
imaginary parts clearly.

The baseband waveforms recovered from the modulated RF carrier, as displayed in the
figures above, do not directly reveal much about how the transmitter affects them. The
steps below tell you how to display the associated trajectory, which is the plot of one
waveform against the other. The trajectory reveals much more about what kind of
distortion the transmitter introduced. The steps below first display the input baseband
trajectory and then the output baseband trajectory. A comparison of the two trajectories
reveals whether the power amplifiers in this example are really distorting the signal.
Action6-24:

In the Waveform window, double click on X Axis and set the Range to
Auto.

Action6-25:

In the Plot vs. field (at the bottom of the form), select /net64 Voltage ;
reV ; Harm = 1 and click OK.

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The plot below appears in the Waveform window. This is the input baseband trajectory,
undistorted by the power amplifiers.

Action6-26:

Close the Waveform window, then repeat the steps that you used to
display the plot for /net 64, but substitute the /RFOUT net for /net64.

The plot you create in the Waveform window will look like this.

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The entire trajectory is scaled linearly and rotated. The output baseband signal is the
input baseband signal, multiplied by a complex constant. The input and output waveforms
look different because of the rotation, not because of some non-linear distortion. A
common non-linear distortion, such as saturation, makes the outer edges of the trajectory
lie on a circle.
The adjacent channel power ratio (ACPR) is a common index of how much power a
transmitter emits outside its allotted frequency band. To measure ACPR, first obtain the
power spectral density of the transmitted signal. This section describes how to plot the
transmitted power spectral density.
To estimate ACPR, drive the transmitter with realistic baseband signals. In most cases,
the baseband signals come from digital filters. The digital filters constrain the spectrum
of the input baseband signal. Distortion in the transmitter causes the spectrum to grow
where it should not. This growth is why you need an ACPR measurement.
The uncategorized part of the rfLib contains three sets of stored baseband waveforms,
cdma, dqpsk, and gsm. These waveforms were created with the baseband signal
generators in the testbench category of the rfLib. The ppwlf sources also read the System

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Processing Worksystem (SPW) format. Therefore, these files can be generated using
input baseband waveforms obtained through SPW.
Action6-27:

In the Direct Plot form, set these options:


a. Select Replace for Plot Mode.
b. Select Voltage for Function.
c. Select spectrum for Sweep.
d. Select dB10 for Modifier.
e. Specify 1 for Harmonic Number.
f. Specify the Time interval from 0 to 0.0001.
g. Type 5M for Nyquist half-bandwidth.
h. Type 0.1M for Frequency bin width.
i. Type 3M for Max. plotting frequency.
j. Type -3M for Min. plotting frequency.

The completed form looks like this.

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The stored waveforms for the input baseband signals were sampled at just under 5 MHz
and the Nyquist half-bandwidth is also 5 MHz. This means the spectral algorithm must
interpolate more than usual to generate enough time points for requested analysis.
The results in this case appear reasonable below 3 MHz but not beyond. As a general
rule, keep the Nyquist half-bandwidth value below half the sample rate used to generate
the input data. This example stretches the Nyquist criterion.
Action6-28:

In the schematic, click on the RFOUT net and the output of the adder.

As you can see in the above figure, because the input level is very low, the PA is still
working in linear region, the output power doesnt have too much leakage into the
adjacent channel.
Action6-29:

Calculate the ACPR for two x-axis values by subtracting their associated
y-axis values. (ACPR measured with respect to x1 and x2 is y1 - y2).

Action6-30:

Close the waveform window.

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Using the ACPR Wizard


In this quick exercise, you will rerun the previous ACPR demonstration using the Spectre
RF ACPR Wizard.
Action6-31:

Open the ACPR wizard in one of two ways.


In the Simulation window, choose Tools - RF - Wizards - ACPR
or

In the envlp Choosing Analyses form, press Start ACPR Wizard.

In either case the ACPR Wizard displays.


Action6-32:

Set the following:


Clock Name

fff

Net

/RFOUT

Channel Definitions

IS-95

Main Channel Width

5M

Stabilization Time

Resolution Bandwidth

7500 (calculate button)

Repetitions

The number of repetitions is set to 2, which gives a reasonable simulation time and
accuracy. Increasing the number of repetition will provide a better accuracy at a cost of a
longer simulation time.
Your ACPR wizard form should look like this:

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Action6-33:

On the ACPR Wizard form click Apply.

This action loads the output section of the ADE window with your selected values.

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The ADE window now looks like this:

Action6-34:

In the ADE window, press the plot button on the right-hand toolbar.

The Waveform Window opens:

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Now your Virtuoso Analog Design Environment window look likes this:

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Action6-35:

Rerun these steps a few times substituting values in the ACPR Wizard.

You can change the Flexible Balance engine to shooting engine, change the number of
harmonics to 1, and re-run the simulation. Or you can load the state
Lab6_ENVLP_shooting and repeat Action6-12 to Action6-30.
The envlp analysis form with shooting engine will look like:

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You can also change the plo level and re-run simulation with both Flexible Balance
engine and shooting engine. You will conclude that for linear or weakly nonlinear circuit,
Flexible balance engine is faster.
Action6-36:

Close the waveform window. Click Cancel on the Direct Plot form. Close
the Virtuoso Analog Design Environment window.

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Conclusion
This workshop describes how to use spectreRF for RF power Amplifiers designs. It first
presents the typical PA design parameters and describes how to build testbenches and
perform measurements within Analog Design Environment. It then covers in detail how
to set up spectreRF analyses and perform measurements related to PA design. Lastly, this
workshop displays and interprets the simulation results.

Reference
[1]

B. Razavi, RF Microelectronics, Prentice Hall, 1998.

[2]

T. Lee, The Design of CMOS Radio Frequency Integrated Circuits,


Cambridge University Press, 1998.

[3]

Ken Kundert, Predicting the Phase Noise and Jitter of PLL-Based Frequency
Synthesizers, The Designers Guide, www.designers-guide.com, 2005

[4]

M. Hella, RF CMOS Power Amplifiers: Theory, Design and Implementation,


Kluwer Academic Publishers, 2002.

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