#INDIAN INSTITUTE OF TECHNOLOGY, KHARAGPUR
Date: 17 Feb 2012(AN)
Time: 2 Hrs. Full Marks: 30
No. ofStudents: 251
Mid Spring Semester 2011-2012
Department: E&ECE Subject No.: EC 21008/EC21010
B. Tech.
Subject Name: ANALOG ELECTRONIC CIRCUITS
Answer ALL the questions.
1. A signal generator generates 330 mVpp signal under unloaded condition. The voltage drops
down to 30 m VPP when a load RL is directly connected to the signal generator. When the same
signal generator is connected to the input of an amplifier having an inherent voltage gain of
100, input resistance of 1 KQ and output resistance of 225 Q, the voltage observed across the
same load RL (which is now connected to the output of the amplifier), to be 4 Vpp. Write the
expression of the overall voltage gain. Find out the probable values of the load resistance RL
and the source resistance rs of the signal generator.
(6)
2. Design a common emitter amplifier (without emitter resistor) to maximize the output swing for
an available power supply of 9 V, while maintaining a quiescent collector current of 3 rnA.
Assume P = 100, VsE(ON) = 0.6 V. Ignore VcE(SAT) for this calculation. Set the lower cutoff
frequency to be equal to 20 Hz. Draw the complete circuit along with the values of the
associated components. Calculate the mid-frequency voltage gain of your designed circuit.
(6)
3. Draw the frequency response of a common source amplifier clearly indicating the numerical
values of lower cutoff frequency, mid-frequency voltage gain and upper cutoff frequency, for
2
the following given device parameters and operating conditions: Vth = 1 V, K = 500 p.AIV , 'A.=
0, Cgs = 2 pF, Cgd = 2 pF. Assume a power supply voltage of 6 V, gate voltage set at 3 V by a
potential divider comprised of two 100 KQ resistor connected between gate and power supply
terminals. Source is directly connected to ground and drain is connected to the power supply
through a fixed resistance such that the drain voltage is 4 V. The amplifier is driven by a signal
source having a source resistance of 600 Q connected to the gate terminal via a 1 p.F capacitor.
(6)
4. Draw the circuit diagram of a common base amplifier including all the biasing arrangements
from a single power supply. Clearly identify the input and the output terminals. Draw the small
signal equivalent circuit and derive the expressions for its voltage gain and input resistance.
~ (6)
5. Draw the circuit diagram of an emitter follower using a p-n-p transistor. Draw he small signal
equivalent circuit. Derive the expression for input resistance of the circuit. Derive the
expression of output resistance of the emitter follower when it is driven by a signal source with
nonzero source resistance.
(6)
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