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2-1 Internal Miaasd: Increment or Decrement

This document discusses the programming model and memory addressing of microprocessors. It describes the main registers including general purpose registers like RAX, RBX, RCX, RDX and segment registers like CS, DS, ES, SS. It explains real mode memory addressing which uses a segment address and offset to generate a physical memory address. Special purpose registers store the instruction pointer, stack pointer and status flags.

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0% found this document useful (0 votes)
47 views3 pages

2-1 Internal Miaasd: Increment or Decrement

This document discusses the programming model and memory addressing of microprocessors. It describes the main registers including general purpose registers like RAX, RBX, RCX, RDX and segment registers like CS, DS, ES, SS. It explains real mode memory addressing which uses a segment address and offset to generate a physical memory address. Special purpose registers store the instruction pointer, stack pointer and status flags.

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INTRODUCTsedfasdIONer

 programmablesdf devicefa and flat modes of operation


2-1 INTERNAL MIaasd
The Programming Modelfa
 program visible
 program invisibleqs
Multipurpose Rsdfegsdfisterass
 RAX – 64-bit register(RAX), 32-bit(accumulator)(EAX), 16-bit(AX), and two
8-asdfbit registers (AsdH and AL)
 RBX – RBX, EBX, BX, BH, BL. – BX register (base index)
 RaCX, as RCX, ECasdX, CdfX, CH, or CL. (count)
 RDsdfX, asdfasdfas RDXasdfaasdfsdf, EDX, DX, asdfaDH, or DL. (data)
 RBP, as RBP, EBP,fa or BP. (Base Pointer)
 RDfaI addressable as RDI, dfaEDI, or DI. (destination index)
 RSI used as RSI, ESI, or SI. (Source Index)
 R8 asd– R15 foundsdf in the fasdPentium 4 and Core2 if 64-bit extensions
are enabled.
Special-Purpose Registeasdfrs
 RIP,f RSP, and RFLAGS
 RIP defined as Register ifaasdnstruction pointer.
 RSP dasdefined as Registerf stack pointer
 RasdfFLAGS
List of Each Flag bit, with asda brief dfaescription of function.
 C (cfarry) holds the carry after addition or borrow after subtraction.
asdfP (parity) is the count osdff ones in a number expressed as even or odd.
Logica 0 for odd parity; logic 1 for even parity.
 A (auxiliasdary carry) positiosdafns 3 and 4.
 Z (zsdfero) shows that the result of an arithmetic or logic operation is zero.
 S (asifgn) flag holds the aritasdfahmetic sign of the result after an
arithmetic or logic instruction exesdfcutes.
 T (trap) The trap flag enables trapping through an on-chip debugging
feature.
 dsf
 D (direction) selects increment or decrement
 O (asdoverflow)
 IOPL used in protected mode operation to select the privilege level for I/O
devices.
 NT (nested task) flagasdfasdf indicates the current task is nested within
another task in protected mode operation.
 RF (resume) used with debuggisdfng to control resumption of execution
after the next instruction.sdfaa
 VM (virtual mode) flag bsdfit selects virtual mode operation in a protected
mode system.asdfa
 AC, (alignment cheasdck) flag bit activates if a word or doubleword is
addressed on a nonfa-word or nondsf-doubleword boundary.
 VIF is a copy of the isdfanterrupt flag bit available to the Pentium 4-(virtual
interrupt)asd
 VIP (virtual) provides information about a virtual mode interrupt for
(interrupt pending) Pentium.f
 ID (identification) flag indicates thasdat the Pentium microprocessors
support the CPUID instruction.f
Segment Registersasdasd
 Generate memory addresses
 Four or six Segment resdgistefars
 CS (code) segmenfat holds code (prograsdams and procedures) used by the
microprocessorsdf.df
 DS (data) contains most data used byas a program.
 ES (extra) an aadditional data segmentsdf used by some instructions to
hold destinatsdfion data.fasd
 SS (stack) defines the area of memory used for the stack.
 FS and GS seasgments are supplemental segment registers available in
80386 – Core2 microprocessor. – allow twoa additional memory segments
for access bdfy programs.
 Windows uaasdfses these segments for isdffanternal operations, but no
definition of their usage is available.
2-2 REAL MODE MEMORY ADDRESSING
 Real mode operation, - memory, conventional memory, or DOS memory
system.a
Segments and Offsets
 All real mode mesdfmory addresses must consist of a segment address plus
an offset address. – segment address, - offset address
 Segment plus offdfasdfasset
 Ending address
Default Segment and asdfasdfasdfnasdft register defines the start of the code
segment.
 The instruction pointer locates the next instruction within the code
segment.asdfasdfasdfasdfasd
 Aasdfasd
 Fasdf
 Asd
 Fa
 Sdf
 Asdf
 A
 sdfs

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