📘 1.

Data Movement Instructions:

These instructions move data between registers, memory, or I/O devices.

Example: MOV AX, BX moves data from BX to AX.

📘 2. Arithmetic and Logic Instructions:

These perform mathematical and logical operations such as ADD, SUB, AND, OR.
Example: ADD BX, 0534, AND AX, 1234

📘 3. Program Control Instructions:

These instructions change the flow of execution using conditions.

Example: CMP AX, 0, JNE 1234 (Jump if not equal)

📘 4. Special Instructions:

These control the CPU behavior like enabling/disabling interrupts.

Examples: CLI disables interrupts, STI enables them.

📘 5. Intel iAPX88 Architecture:

Intel 8088 is a 16-bit processor used in early IBM PCs. It is part of Intel’s iAPX88 architecture
and was succeeded by iAPX386 (32-bit). The architecture defines the registers and
instructions supported.

📘 6. History:

Intel started with 4-bit and 8-bit processors like 8080 and 8085. The first 16-bit processor
was 8088 which became highly successful in IBM PCs. The architecture stayed popular
beyond Intel’s expectations and influenced future designs.
Register Full Form Simple Meaning

AX Accumulator Maths operations ka boss register

BX Base Addressing ke liye use hota hai

CX Counter Loops ya counting instructions mein

DX Destination Input/Output ke liye use hota hai

✅ Ye sab 16-bit hote hain.

✅ Inko do 8-bit mein bhi split kiya ja sakta hai:

 AX → AH (High) + AL (Low)

📌 Note: Agar aap AL ko change karo to AX bhi change ho jata hai.

📘 2. Index Registers (SI, DI):

 SI (Source Index) – holds address of source data.

 DI (Destination Index) – holds address where data goes.

Used mostly in string and array processing.

📘 3. Instruction Pointer (IP):

This register holds the address of the next instruction to execute.

It is automatically updated and not accessed directly.

📘 4. Stack Pointer (SP) and Base Pointer (BP):

 SP (Stack Pointer) – points to the top of the stack.

 BP (Base Pointer) – helps access data inside the stack.

📘 5. FLAGS Register:
The FLAGS register is a special register in the CPU that stores the status of the result after a
calculation or logic operation.

Each bit in this register is called a flag, and each flag has a different meaning. These flags
help the processor make decisions like whether to jump to another instruction, or whether
an error occurred.

This register shows results of operations using bits.

Flag Full Name Simple Explanation

Set to 1 if an arithmetic operation creates a carry out (like if the result is

C Carry Flag
bigger than the register can hold). Example: 255 + 1 causes carry.

Set to 1 if the number of 1s in the result is even. Used for error checking in
P Parity Flag
communication.

Auxiliary Set if a carry occurs between lower nibbles (4 bits) of the result. Used in
A
Carry BCD (binary coded decimal) operations.

Z Zero Flag Set if the result of the operation is zero. Example: 3 - 3 = 0 → Z flag is set.

Set if the result is negative (when the most significant bit is 1 in signed
S Sign Flag
numbers).

Used in debugging. When set, the processor executes one instruction at a

T Trap Flag
time (step-by-step).

Interrupt Controls whether the CPU can respond to hardware interrupts. If set to 1
I
Flag → interrupts are allowed.

Direction Used in string operations to tell the CPU whether to move forward or
D
Flag backward through memory.

Overflow Set if the result of a signed arithmetic operation is too large or too small,
O
Flag causing incorrect sign in the result.

Each bit gives important status about last arithmetic or logic operation.

📘 6. Segment Registers (CS, DS, SS, ES):

These divide memory into segments:

 CS – for instructions

 DS – for data
  SS – for stack

 ES – for extra space

📘 Segmented Memory Model:

 Divides 1MB memory into 64KB segments

 Four segment registers:

o CS – for code

o DS – for data

o SS – for stack

o ES – extra (optional)

 Real address = Segment × 10h + Offset

 This model is both efficient and backward compatible with older processors

📘 What is Physical Address?

In Intel 8086/8088, physical address is the real memory address in 20-bit form.

📘 How is Physical Address Calculated?

Use this formula:

Physical Address = (Segment × 16) + Offset

Example:

 CS = 1DDD

 IP = 0100

 Physical Address = 1DDD0 + 0100 = 1DED0

📘 Paragraph Boundaries:

 Segments are always defined on 16-byte boundaries.

 So, segments can only start at 0, 16, 32, 48, etc.

📘 What are Overlapping Segments?

 Multiple segment:offset pairs can point to the same physical address.

 Example:

o 1DDD:0100

o IDED:0000

o IDCD:0200
All refer to the same memory location.

📘 Logical vs Physical Address:

Term Meaning

Logical Address Segment:Offset format (e.g., 1DDD:0100)

Physical Address Actual address used in memory (e.g., 1DED0)

Chapter 2:
2.1 Data Declaration

 In assembly, variables are declared using directives like DB, DW, DD.

 Example:

 num1 DB 10h ; Declares a byte with value 10h

num2 DW 1234h ; Declares a word with value 1234h

Question: What is the size of data declared by DW?

Answer: 2 bytes (word size)

2.2 Direct Addressing

 Access memory using a specific address.

 Example:

MOV AL, [1234h] ; Load byte at memory location 1234h into AL

Question: In direct addressing, the operand is a:
Answer: Memory address

2.3 Size Mismatch Errors

 Occurs when you move mismatched data sizes (e.g., byte into word).

 Example:

 MOV AX, [1234h] ; OK if word is at 1234h

 MOV AL, [1234h] ; OK if byte is at 1234h

MOV AX, [AL] ; ❌ Invalid – AL is not a valid address

Question: What type of error occurs when data size is mismatched in MOV?
Answer: Size mismatch error

2.4 Register Indirect Addressing

 Memory address is stored in a register like BX, SI, or DI.

 Example:

 MOV BX, 1234h

MOV AL, [BX] ; Load byte from memory at address in BX into AL

Question: Which registers are used in register indirect addressing?

Answer: BX, SI, DI

2.5 Register + Offset Addressing

 Combines register with constant offset.

 Example:

 MOV BX, 4

MOV AL, [011Fh + BX] ; Effective Address = 0123h

Question: If BX = 4 and offset = 011Fh, effective address = ?

Answer: 0123h

2.6 Segment Association

  CS, DS, SS, ES are segment registers. Default for data is DS.

 Instruction fetch uses CS; Stack uses SS.

Question: Which segment is used by default for data variables?

Answer: DS

2.7 Address Wraparound

 Memory addresses are 16-bit. Max address = FFFFh (64KB).

 If address > FFFFh, it wraps around to 0000h.

Question: What is the result of accessing memory at FFFFh + 1?

Answer: 0000h (wraps around)

2.8 Addressing Modes Summary

Addressing Mode Example Description

Immediate MOV AL, 05h Constant value

Direct MOV AL, [1234h] Uses memory address

Register Indirect MOV AL, [BX] Uses register address

Register + Offset MOV AL, [SI + 10] Adds offset to register

Question: Which addressing mode is used in MOV AL, [BX+SI]?

Answer: Based Indexed Addressing (combination of base and index)

 Two types of address wraparound:

 Offset wraparound: e.g., 0xFFFF + 1 = 0x0000

 Segment wraparound (if segment exceeds 64KB)

 If DS = FFFFh, BX = FFFFh, SI = FFFFh: Physical Address = DS × 10h + (BX + SI) = FFFF0 +

1FFFE = wraps around

Stack Clearing

After the subroutine finishes, the parameters are no longer needed and must be cleared to
avoid stack overflow.
Two options:

 Caller clears: Adds extra code after each CALL to remove parameters.

 Callee clears: Uses RET n to remove the return address and n bytes of parameters.
This is the standard method in most languages.