B.E./ B. Tech.
DEGREE EXAMINATION NOVEMBER/DECEMBER 2016
                                                 Third Semester
                                    Electrical andElectronicsEngineering
                 EE 6303 – LINEAR INTEGRATED CIRCUITS AND APPLICATIONS
                                               (Regulations 2013)
Time: Three hours                                                                       Maximum: 100 marks
                                             Answer ALL questions
                                           PART −A (10×2=20 marks)
1. What are the ideal characteristics of an OP – AMP?                                              [ND –
   2015]
   (i ) Open loop gain infinite
   (ii) Input impedance infinite
   (iii) Output impedance low
   (iv) Bandwidth infinite
   (v) Zero offset, ie, Vo=0 when V1=V2=0
2. Mention the frequency compensation methods.
   1. Dominant-pole compensation
   2. Pole-zero compensation.
3. What do you mean by input offset current and offset voltage?(A/M 15)
   Input offset current is defined as the algebraic difference between the currents into the (-) input and (+)
   input. For 741 IC the maximum value is 200 nA
   It is the voltage that must be applied between the input terminals of an op-amp to nullify the
   output. Since this voltage could be positive or negative its absolute value is listed on the data
   sheet.
4. Define CMRR.(A/M 15)
   It is defined as the ratio of the differential voltage gain to common mode voltage gain.
   CMRR= ρ = Ad/Ac
5. Why IC 741is not used for high frequency applications.(M/J 16)
   IC741 has a low slew rate because of the predominance of capacitance present in the circuit at higher
   frequencies. As frequency increases the output gets distorted due to limited slew rate.
6. Draw the circuit diagram of an integrator and give its output equation.(M/J 16)
7. Draw an adder circuit using an op-amp to get the output expression as V0 = - (0.1 V1 + V2 +10 V3 where V1, V2
   and V3 are the inputs.(N/D 14)
8. A 100 pF capacitor has a maxi1um charging current of 150 microamps. What is the slew rate?(N/D 14)
   It is defined as the maximum rate of change of output voltage with time. The slew rate is specified in
   V/µsec
   Slew rate = S = dVo / dt |max
   S = Imax / C
9. Write some applications of operational amplifier.
   Differential amplifier
   Non-inverting amplifier
   Voltage follower (unity buffer amplifier)
   Instrumentation amplifier, Precession rectifier
10. What is integrator?
   The operational amplifier integrator is an electronic integration circuit. Based on
   the operational amplifier (op-amp), it performs the mathematical operation of integration with
   respect to time; that is, its output voltage is proportional to the input voltage integrated over
   time.
11. What are the D.C Characteristics of Op-amp?
   1. Input Bias current.
   2. Input offset current.
   3. Input offset voltage.
   4. Thermal Drift.
12. Define slew rate and state its significance
   The slew rate is defined as the maximum rate of change of output voltage caused by a step input
   voltage. An ideal slew rate is infinite which means that op-amp’s output voltage should change
   instantaneously in response to input step voltage.
                                             PART – B (80 marks)
11. (a) (i) What is Slew rate? List the causes of the Slew rate and explain its significance in applications.
                                                                                            (10) [ND – 2015]
             It is defined as the maximum rate of change of output voltage with time. The slew rate is
   specified in V/µsec
   Slew rate = S = dVo / dt |max
   It is specified by the op-amp in unity gain condition.
   The slew rate is caused due to limited charging rate of the compensation capacitor and current
   limiting and saturation of the internal stages of op-amp, when a high frequency large
   amplitude signal is appliedIt is given by
    dVc /dt = I/C
   For large charging rate, the capacitor should be small or the current should be large.
   S = Imax / C
   For 741 IC the charging current is 15 µA and the internal capacitor is 30 pF. S= 0.5V/ µsec
   S = 2 π f Vm V / sec
(ii) Briefly explain the methods used for frequency compensation.                  (6) [ND – 2015]
   Because operational amplifiers are so ubiquitous and are designed to be used with
   feedback, the following discussion will be limited to frequency compensation of these
   devices.
   It should be expected that the outputs of even the simplest operational amplifiers will
   have at least two poles. An unfortunate consequence of this is that at some critical
   frequency, the phase of the amplifier's output = −180° compared to the phase of its input
   signal. The amplifier will oscillate if it has a gain of one or more at this critical frequency.
   This is because (a) the feedback is implemented through the use of an inverting input
   that adds an additional −180° to the output phase making the total phase shift −360° and
   (b) the gain is sufficient to induce oscillation.
   A more precise statement of this is the following: An operational amplifier will oscillate at
   the frequency at which its open loop gain equals its closed loop gain if, at that frequency,
                    1. The open loop gain of the amplifier is ≥ 1 and
                    2. The difference between the phase of the open loop signal and phase
                       response of the network creating the closed loop output = −180°.
                       Mathematically,
            ΦOL – ΦCLnet = −180°
               Practice
               Frequency compensation is implemented by modifying the gain and phase
               characteristics of the amplifier's open loop output or of its feedback network, or
               both, in such a way as to avoid the conditions leading to oscillation. This is
               usually done by the internal or external use of resistance-capacitance networks.
                                                 Or
(b) (i) Draw and explain the operation of a current to voltage converter.              (8) [ND – 2015]
       1. Open – loop gain a of the op-amp is very large.
       2. Input impedance of the op-amp is very high. (i.e) the currents entering into the 2 input
       Terminals are very small. IB1=IB2= 0 ---(2)
    (ii) What are the limitations of an ordinary op-amp differentiator? Draw the circuit of a practical
       differentiator that will eliminate these limitations.                         (8) [ND – 2015]
12. (a) (i) Design an op-amp circuit to give an output voltage V0 = 4V1-3V2+5V3-V4 where V1 ,V2 ,V3 and V4 are
            inputs.                                                                           (8)(A/M 15)
        (ii) Explain voltage to current converter using operational amplifier
            Also explain the application of OP-Amp as integrator                              (8)(A/M 15)
            Integrator:
            A circuit in which the output voltage waveform is the integral of the input voltage
            waveform is the integrator or Integration Amplifier. Such a circuit is obtained by using a
            basic
            inverting amplifier configuration if the feedback resistor RF
            is replaced by a capacitor CF .
            The expression for the output voltage V0can be obtained by KVL eqn at node V2.
                                                       or
    (b) (i) Explain in detail about the methods of frequency compensation
            used in operational amplifiers.                                                   (10)(A/M 15)
         (ii) What is slew rate and how it can be improved?                                   (6)(A/M 15)
            It is defined as the maximum rate of change of output voltage with time. The slew rate is
            specified in V/µsec
            Slew rate = S = dVo / dt |max
            It is specified by the op-amp in unity gain condition.
            The slew rate is caused due to limited charging rate of the compensation capacitor and current
            limiting and saturation of the internal stages of op-amp, when a high frequency large
            amplitude signal is appliedIt is given by
             dVc /dt = I/C
            For large charging rate, the capacitor should be small or the current should be large.
            S = Imax / C
            For 741 IC the charging current is 15 µA and the internal capacitor is 30 pF. S= 0.5V/ µsec
            S = 2 π f Vm V / sec
13. (a) (i) Discuss the frequency response characteristics and compensation of an
            operational amplifier.                                                          (16) )(M/J 16)
                                                        or
     (b) (i) Explain the application of Op-Amp as differentiator                                       (8) (M/J 16)
             Uses:
             Its used in waveshaping circuits to detect high frequency components in an input signal and
             also as
             a rate of change and detector in FM modulators.
         (ii) Find V0 for the given circuit.                                                           (8) (M/J 16)
14. (a) (i) Consider lossy integrator as shown in Figure 2. For the component values R1 = 10 k, Rf = 100 k, Cf= .
             Determine the lower frequency limit of integration and study the response of the inputs
             (1) step input
             (2) square input
             (3) sine input
         (ii) Design an adder sub tractor circuit for V0 = 2V1 +5V2-10V3 (6)(N/D 14)
                                                         or
15. (a) (i) Discuss in detail about the DC and AC characteristics of op amp                  (13) (N/D 16)
            DC Characteristics of op-amp:
            Current is taken from the source into the op-amp inputs respond differently to current and
            voltage due to mismatch in transistor.
            DC output voltages are,
            1. Input bias current
            2. Input offset current
            3. Input offset voltage
            4. Thermal drift
            1. Input bias current
            Input offset current:
            Bias current compensation will work if both bias currents IB+ and IB- are equal.
            Since the input transistor cannot be made identical. There will always be some small
            difference between IB+ and IB-.
        This difference is called the offset current|Ios|=IB+ -IB-——>(10)
        Offset current I
         for BJT op-amp is 200nA and for FET op-amp is 10pA. Even with bias current
        Input offset voltage:
        Inspite of the use of the above compensating techniques, it is found that the output voltage
        may still not be zero with zero input voltage [Vo ≠ 0 with Vi = 0]. This is due to unavoidable
        imbalances inside the op-amp and one may have to apply a small voltage at the input terminal
        tomake output (Vo) = 0.
         This voltage is called input offset voltage Vos. This is the voltage required to be applied at
        the input for making output voltage to zero (Vo = 0).
        Thermal drift:
        Bias current, offset current, and offset voltage change with temperature.
        A circuit carefully nulled at 25ºC may not remain. So when the temperature rises to 35ºC.
        This is called drift.
        Offset current drift is expressed in nA/ºC.
        These indicate the change in offset for each degree Celsius change in temperature.
(b) (i) Explain the differe3ntial amplifier using op amp                                  (13) (N/D 16)
        Differential Amplifier with Active load:
        Differential amplifier are designed with active loads to increase the differential mode
        voltage gain.
        The open circuit voltage gain of an op-amp is needed to be as large as possible. This is
        achieved by
        cascading the gain stages which increase the phase shift and the amplifier also becomes
        vulnerable
        to oscillations. The gain can be increased by using large values of collector resistance. For
        such a circuit, the voltage gain is given by
        product must be made very large. However, there are limitations in
        IC fabrication such as,
        1. a large value of resistance needs a large chip area.
        2. for large RC,
        the quiescent drop across the resistor increase and a large power supply will be
        required to maintain a given operating current.
        3. Large monolithic resistor introduces large parasitic capacitances which limits the frequency
        response of the amplifier.