Encoders


An encoder has
 2N inputs
 N outputs

An encoder outputs the binary value of the selected
input.

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 1

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 2
X = D4 + D5 + D6 + D7
Y = D2 +D3 + D6 + D7
Z = D1 + D3 + D5 + D7

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 3

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 4
24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 5
24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 6
Decimal to binary encoder

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 7

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 8
 1. Decoder: Definition
• N inputs, 2N outputs
• One-hot outputs: only one output HIGH at once

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 9

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 10
24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 11
Realization

Symbol

Logic Diagram

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 12

Truth Table
Implement Full adder using decoder

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 13

Implement Full subtractor using decoder

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 14

Magnitude comparator

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 15

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 16
 Expression for A < B
Y = A1’B1 + A1’A0’B0 + A0’B1B0

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 17

 Expression for A = B
Y = A1’A0’B1’B0’ + A1’A0B1’B0 + A1A0B1B0 + A1A0’B1B0’

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 18

 Expression for A > B
Y = A1B1’ + A0B1’B0’ + A1A0B0’

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 19

UNIT-II
• Introduction to Combinational Design: Binary Adders, Subtractors
and BCD adder, Code converters Binary to Gray, Grayto Binary, BCD to
excess3, BCD to Seven Segment display, Decoders, Encoders, Priority
Encoders, Multiplexers,Demultiplexers, Comparators,
Implementations of Logic Functions using Decoders and Multiplexers.

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 20

UNIT-III
• Sequential Logic Design: Latches, Flipflops, Difference between latch
and flipflop, types of flipflops like S-R, D, T JK and Master-Slave JK FF,
Edge triggered FF, flipflop conversions, setup and hold times, Ripple
and Synchronous counters, Shiftregisters, Finite state machines,
Design of synchronous FSM, Algorithmic State Machines charts.

24-05-2023 Dr B KHALEELU REHMAN,Associate Professor Dept of ECE,CBIT 21