8086 Memory Address Space Partition

And
Addressing Modes

Course Teacher:
Deboky Saha
Contractual Lecturer
Department of Computer Science & Engineering
BRAC University.

Course ID: CSE341

Course Title: Microprocessors
Lecture References:
 Book:
 Microprocessors and Interfacing: Programming and Hardware,
Chapter # 2, Author: Douglas V. Hall
 The 8086/8088 Family: Design, Programming, And Interfacing,
Chapter # 2, Author: John Uffenbeck.

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Memory Segmentation
 Segmentation is the process in which the main memory
of the computer is logically divided into different
segments and each segment has its own base address (the
starting address)

 It is basically used to enhance the speed of execution of

the computer system, so that the processor is able to fetch
and execute the data from the memory easily and fast

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Memory Partitioning for 8086 Processor
 The 8086 processor assign a 20-bit physical address to its
memory locations.
220 → 1 Mbyte
20 bits → 5 hex digits
First addresses: 00000, 00001,…,0000A,…FFFFF.
But Registers are 16-bits and can address only 216 = 64 KBytes.

 Partition the memory into segments

 One way four (4) 64 Kbytes segments might be positioned within the
1 Mbyte address space of an 8086 processor.

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Memory Segment: Address Space
 Memory segment is a block of 216 (64) KBytes
consecutive memory bytes.

 Each segment is identified by a 16-bit number called

segment number, starting with 0000 up to FFFFh.
Segment registers hold segment number.

 Within a segment, a memory location is specified by

giving an offset (16-bit) = It is the number of bytes
from the beginning of the segment (0→ FFFFh).

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Memory Segment: Address Space
F0000
FFFF0 To FFFFF
E0000
is reserved for
D0000
ROM (16 bytes)
C0000

B0000

A0000

90000 8000:FFFF
80000 One Segment
8000:0000
70000

60000

50000 segment offset

40000

30000 00000 to 3FFFF

20000 is reserved in
10000 RAM to load
00000
system function
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Memory Segment: Address Space
 A memory location may be specified by a segment number
and offset ( logical address ).
Example :
A4FB : 4872
h
Segment Offset

 Offset: is the distance from the beginning to a particular

location in the segment.

 Segment Number: defines the starting of the segment

within the memory space.
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Segmented Memory Location
F0000
E0000 8000:FFFF
D0000
C0000
B0000
linear addresses

A0000
90000
80000 one segment
70000
60000
8000:0250
50000
0250
40000
30000 8000:0000
20000
10000
seg ofs
00000

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Segmented Memory Address
 Start location of the segment must be 20 bits  the absolute
address is obtained by appending a hexadecimal zero to the
segment number, i.e. , multiplying by 16(10h).
 Adds 4 Nibble bits at the lower portion of each 16-bit address.

 So, the Physical Memory Address is equal to:

Physical Address = Segment number X 10h + Offset

 Physical Address for A4FB : 4872

A4FB0 h
+ 4872 h
A9822 h (20 Bits)
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Physical Location of Segments
 Segment 0
 starts at address 0000:0000  00000 h
 ends at address 0000:FFFF  0FFFF h

 Segment 1
 starts at address 0001:0000  00010 h
 ends at address 0001:FFFF  1000F h

 Overlap occurs between the Segment 0 and 1.

 Advantage: Utilization of memory would be higher.

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Overlapping Segment
 A segment starts at a particular address and its maximum
size can go up to 64KB.
 However, if another segment starts along with this 64KB
location of the first segment, then the two are said to
be Overlapping Segment.
 So, the next segment starts before the ending of the first
segment.
 It is mainly done for memory utilization and better
searching for a memory location.

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Physical Location of Segments
Segment Physical Address (hex)
…
10021
10020
End of Segment 2 1001F
1001E
…
10010
End of Segment 1 1000F
1000E
…
10000
End of Segment 0 0FFFF
0FFFE
…
00021
Start of Segment 2 00020
0001F
…
00011
Start of Segment 1 00010
0000F
…
00003
00002
00001
Start of Segment 0 00000

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Memory Banking
 As 8086 has a 16 bit data bus, it should be able to access
16 bit data bus in one cycle
 One memory location carries 8 bit of data and 16 bit of
data is stored in two consecutive locations
 The Address bus cannot contain 2 addresses at a time
 Thus, if both these memory locations are in the same
memory chip then they cannot be accessed at the same
time
 The division is done in such a way that two consecutive
locations lie in two different chips . Hence, each chip
contain alternate locations.
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Memory Banking
 The bank containing all the even addresses are called
Even bank or Lower bank
 The bank containing all the odd addresses are called odd
bank or Higher bank
 From one chip, you can select one location and get 8 bit of
data and from another chip you can select one location
where you can get 8 bit of data

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Memory Banking

ODD Bank EVEN Bank

/Higher Bank /Lower Bank

00001H 00000H
00003H 00002H
00005H 00004H
. .
. .
FFFFFH FFFFFH

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Memory Banking
Two
A19…….A4 A3 A2 A1 A0 Decimal consecutive
0 0 0 0 0 locations
and aligned
0 0 0 1 1
Two
0 0 1 0 2 consecutive
locations
0 0 1 1 3 and aligned
0 1 0 0 4 Two
consecutive
0 1 0 1 5 locations
and aligned
0 1 1 0 6
Two
0 1 1 1 7 consecutive
locations
and aligned

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Memory Banking
 The difference between two consecutive location is due to
A0
 Location selection is done from A1 to A19
 A0 decides whether we have to select lower bank (chip) or
not but plays no role in selecting the higher bank
 BHE (Bus/Bank High Enable) is used to select Higher

bank

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Memory Banking
Data Bus

8086 A19 512 KB 512 KB

(uP) : (HB) (LB)
A1
CS CS

A0

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Memory Banking
A0 Operation
0 0 Can select 16 bits from both banks
0 1 Can select 8 bits from higher bank
1 0 Can select 8 bits from lower bank
1 1 None of the bank is selected

Selected when BHE = 0

Selected when A0 =0

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Addressing Mode and It’s Categories
 The different ways in which a microprocessor can access
data are referred to as its addressing modes.

 Addressing modes of 8086 Microprocessor are

categorized as:
 Addressing Data
 Addressing Program codes in memory
 Addressing Stack in memory
 Addressing I/O
 Implied addressing

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1. Addressing Data
I. Immediate addressing
II. Direct addressing
III. Register [direct] addressing
IV. Register indirect addressing
V. Base-plus-index addressing
VI. Register relative addressing
VII. Base-relative-plus-index addressing

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1. Addressing Data
I. Immediate addressing
 Data is immediately given in the instruction

MOV BL, 44H ; Moves 44 immediately to BL register

MOV BX,1234H; Moves 1234 immediately to BX
register
ADD CL, 12H ; CL CL+12H
II. Direct addressing
 Data address is directly given in the instruction

MOV BX, [2000H]; Moves data from location 2000H and

2001H in the data segment into BX
BL DS:[2000H] and BH DS:[2001H]

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1. Addressing Data
III. Register [direct] addressing
 Data is in a register.
MOV AX, BX; Moves data of BX into AX register
MOV CL,DL; Moves data of DL into CL register
IV. Register [indirect] addressing
 Register supplies the address of the required data. The
data we need to operate is present in some memory
location. The address of the memory location is present
in a register.
MOV CX, [BX]

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1. Addressing Data

CX gets 16 bit data from two memory locations whose 16

bit offset address is given by BX and BX+1 in the data
segment.
Hence,
CL DS:[BX] and CH DS:[BX+1]

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1. Addressing Data
V. Base-plus-index addressing
Here, operand address is given as the sum of Base register
and Index register
 Base register is either BX or BP
 Index register is either DI or SI

MOV DX, [BX+DI]

Moves 16 bit from location pointed by BX+DI and BX+DI+1 in
the data segment to DX.

VI. Register relative addressing

 Register can be a base (BX, BP) or index (SI, DI)
 Mainly suitable to address array data
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1. Addressing Data
MOV AX, [BX+1000]
Moves a byte from location pointed by BX+1000 in the data segment to
CL.
MOV CL,04H[BX]
Moves a byte from location pointed by BX+4H in the data
segment to CL.

Vii. Base-relative-plus-index addressing

Here, operand address is given as the sum of Base register ,Index
register and displacement.
Suitable for array addressing

MOV AX, [BX+DI+10]

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2. Addressing Program Codes in Memory
 This addressing mode is required for instruction that cause
a branch. Normally a program is executed in sequential
manner. This happens by constantly incrementing IP after
every instruction is fetched.
 In case of branch, the program wants to go somewhere
and not immediately to the next instruction. In that case,
the value of IP changes.
 Used with JMP and CALL instructions

Distinct forms:
 Direct
 Indirect
 Relative
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2. Addressing Program Codes in Memory
 Near Branch:
If the branch is in same segment (code segment) and only
the offset (IP) changes then it is called near branch
 Far Branch:

If the branch is in different segment (code segment) and

along with it the offset (IP) changes then it is called far
branch

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2. Addressing Program Codes in Memory
 Address is directly given in the instruction

JMP 1000: 0000

or JMP doagain ; doagain is a label in code

CALL 1000:0000
or CALL doagain ; doagain is a procedure in code

 Often known as far jump or far call

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2. Addressing Program Codes in Memory
 Address can be obtained from
a) any memory location specified by GP registers
(AX,BX,CX,DX)
b) any memory location specified by relative registers
([BP],[BX],[DI],[SI])
c) any memory location specified by relative register
with displacement (SP,BP,DI,SI)

JMP [AX] CALL [BX]

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3. Addressing Stack in Memory
• PUSH and POP instructions are used to move data
to and from stack (in particular from stack
segment).
• CALL also uses the stack to hold the return address
for procedure.

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4. Addressing Input and Output Port
 IN and OUT instructions are used to address I/O ports

 Could be direct addressing

IN AL, 05h ; Here 05h is a input port number

 or indirect addressing
OUT DX, AL ; DX contains the address of I/O port

 Only DX register can be used to point a I/O port

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5. Implied Addressing
 No explicit address is given with the instruction
 implied within the instruction itself
 Examples:
CLC ; clear carry flag
HLT ; halts the program
RET ; return to DOS

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Constructing Machine Codes for 8086
 Each instruction in 8086 is associated with the binary
code.
 You need to locate the codes appropriately.
 Most of the time this work will be done by assembler
 The things needed to keep in mind is:
 Instruction templates and coding formats
 MOD and R/M Bit patterns for particular instruction

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Instruction template
 For 8085: Just look up the hexadecimal code for each instruction.
 For 8086 its not simple. There are 32 ways to specify the source
of the operand in MOV CX, Source.
 The source may be any one of eight 16-bit registers, or a memory
location specified by any one of 24 memory addressing modes.
 If the CX is made the source then-32 possible ways of specifying
the destination.
 Each of these 32 possible instructions require different binary
code.
 Thurs there are 64 different codes for MOV instruction using CX
as a source and destination.
 Its impractical to list them all in a table.

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Instruction Template
 The Intel literature shows two different formats for coding
8086 instructions.
 Instruction templates helps you to code the instruction
properly.
 Example:
IN AL, 05H

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MOV Instruction Coding
 MOV data from a register to a register or from a register
to a memory location or from a memory location to a
register. (Operation Code of MOV: 100010)

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MOV Instruction Coding: REG Field
 REG field is used to identify the register of the one operand

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MOV Instruction Coding:
MOD and R/M Field
 2-bit Mode (MOD) and 3-bit Register/Memory (R/M)
fields specify the other operand.
 Also specify the addressing mode.

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MOV Instruction Coding:
MOD and R/M Field
 If the other operand in the instruction is also one of the
eight register then put in 11 for MOD bits in the instruction
code.
 If the other operand is memory location, there are 24 ways
of specifying how the execution unit should compute the
effective address of the operand in the main memory.
 If the effective address specified in the instruction contains
displacement less than 256 along with the reference to the
contents of the register then put in 01 as the MOD bits.
 If the expression for the effective address contains a
displacement which is too large to fit in 8 bits then out in
10 in MOD bits.
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Example 1

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Example 2
 MOV 43H [SI], DH: Copy a byte from DH register to
memory location.

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Example 3
 MOV CX, [437AH]: Copy the contents of the two memory
locations to the register CX.

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 Thank You !!

44