by Aditya Kamath, Simon Peter on Jul 23, 2026 | Tags: Accelerators, Machine Learning
LLM execution requires moving gigabytes of data, which includes static model weights, the generated KV cache, and other intermediate representations. Depending on the deployment, this may involve communication across the network, PCIe links, accelerator links (e.g.,...
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by Vijay Janapa Reddi on Jul 13, 2026 | Tags: Benchmarks, Machine Learning, Measurements, Methodology
AI is starting to shape architectural mechanisms, workloads, and evaluation. To make sense of it, we need a compact, shared way to preserve enough of that process for other groups to evaluate and build on AI-assisted claims. At the 53rd ISCA in Raleigh, AI for...
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by Bingyao Li on Jul 10, 2026 | Tags: ISCA, Trip Report
The conference The 53rd International Symposium on Computer Architecture (ISCA) was held at the Raleigh Convention Center in Raleigh, North Carolina, from June 27 to July 1, 2026. Raleigh sits at one corner of the Research Triangle, anchored by North Carolina State...
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by Shanqing Lin, Mohammad Alian, Babak Falsafi on Jun 8, 2026 | Tags: Simulation
The Return of Rigorous Full-System Timing Simulation Accurate timing simulation remains one of the most important tools in computer architecture, but modern systems have made cycle-level simulation increasingly impractical. Today’s platforms combine many-core CPUs,...
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by Simha Sethumadhavan on Jun 2, 2026 | Tags: AI Agents, Security, Spectre
When an agent makes an incorrect guess, the obvious mistakes like bad files or stale outputs are straightforward to see. However, there are less visible leaks that pose significant risks, such as timing patterns or cached context. The context and data exchanged between tools, services, and third-party systems can also be problematic. This situation becomes particularly concerning when AI agents take action before fully understanding the task at hand. This leads to an important question: Who holds the responsibility for addressing the residue left behind by agentic mistakes?
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by Dimitrios Skarlatos on May 19, 2026 | Tags: AI Agents, Hardware-Software Co-design
Architecture & Systems are Changing: The Architect’s Role in the Era of Agentic Co-Design The AI datacenter stack is built on hardware-software contracts and abstractions that were never designed for the workloads datacenters now serve. Memory systems strain...
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by Di Wu, Zhewen Pan, Joshua San Miguel on May 13, 2026 | Tags: AI hardware, Parallelism
TL;DR: The history of parallel computing is a history of shifting what we put at the center of the computer. The first axis, control-level parallelism (CLP), is control-centric and schedules around the program counter: it gave us the high-performance computing (HPC)...
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by Helen Wright, Jeff Dean, Mark D. Hill, and Dave Patterson on May 4, 2026 | Tags: AI, Computer Systems
Editor’s Note: this post is a republication of CRA-I post available at: https://cra.org/industry/2026/04/27/how-ai-will-reshape-computer-systems-by-2035-a-jeffersonian-dinner-in-san-francisco-about-our-10000x-future/ CRA-Industry (CRA-I) recently continued its...
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by Digvijay Singh on Apr 29, 2026 | Tags: Data Prefetcher, Memory Wall
This article continues (and concludes) the discussion on the proceedings of DPC-4, covering the remaining four contestants and a summary of the trends observed in all eight prefetchers presented in the championship. Similar to Part I, we focus on how each prefetch...
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by Digvijay Singh on Apr 27, 2026 | Tags: Data Prefetcher, Memory Wall
This article is the first in a two-part series that summarizes the key contributions of 4th Data Prefetching Championship (DPC-4), held in conjunction with the 32nd iteration of HPCA in 2026. While discussing innovative data prefetching techniques presented in this...
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