HardwareRenode
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Software
Generating low-level graphics on Linux devices with YAV, FbTerm, and grvl
Hardware
Open hardware STM32H7 HDMI board optimized for rendering graphics on Zephyr RTOS devices
FPGAASICHardware
Topwrap 0.7.0: improved YAML syntax with initial clock and reset support, extended SystemVerilog parsing, and more
Renode
Simulation-driven development of SoCs accelerated with Google's Coral NPU using Renode and Verilator
SoftwareASIC
Implementing extended technology mapping in OpenROAD with mockturtle integration
Renode
Renode support for NXP i.MX 8M Plus
AI
Open source-driven Gemma 4 integration and deployment with the Antmicro Baseboard for NVIDIA Jetson AGX Thor and Kenning
FPGA
Implementing I3C Host Controller support in the open source I3C Core
Software
Development of USB support in Zephyr RTOS with the implementation of HID Boot device support
Hardware
Open hardware Antmicro Baseboard for Jetson Orin available for purchase on System Designer
SoftwareAI
Antmicro supports NVIDIA-Yocto Project on Jetson launch with open source hardware and tools for OTA, fleet management, factory testing, AI
Renode
Extending Armv8.1-M support in Renode with Helium instructions for Analog Devices' Cortex-M offering
AI
Anomaly detection in embedded devices using the Zephyr Sensor Anomalies library
SoftwareASIC
IEEE-compliant force/release statement support in Verilator
SoftwareASIC
Implementing a genetic algorithm in OpenROAD for improved resynthesis
Renode
Improved simulation-based testing of Google's ChromiumOS FPMCU with Renode support for the RISC-V Andes D25F core and the related Egis ET171 SoC
SoftwareASIC
Initial implementation of four-state logic in the open source Verilator RTL simulator
HardwareASICFPGA
Improvements to Antmicro's DC-SCM 2.1 reference platform: LTPI support, DC-SCM breakout board rev. 2.0, and Fru2Graph
Hardware
Simulating active cooling using a Computational Fluid Dynamics-based flow
Hardware
Antmicro's open hardware SDI-Fiber Adapter for long-distance video transmission in high-EMI environments
ASICFPGA
Dual-core Lockstep in the VeeR EL2 RISC-V core for safety-critical applications and side-channel access mitigation in Caliptra RoT
Renode
Connecting Renode to the Internet on macOS through vmnet and socket-based networking
HardwareSoftware
Simplifying mechanical BOM generation and management with STEPhen
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