EP-8

The Electronic Processor is a tiny retro machine made to simulate the likes of the Altair 8800, however it is made with our current knowledge of how computing works allowing us to avoid many issues the designers of old machines faced. The simulation is also not 100% accurate since we don't factor in the most important question, that being cost.

The CEPU-8

The CEPU-8 is the Central Electronic Processing unit of the EP-8, it performs most of the computations at the heart of an operational EP-8.

Registers

The EP-8 ships with two types of registers, 8-bit registers, which can be used for most instructions and 16-bit registers which are only allowed to be written to and read from, but not operated on.

8-bit

• R0: Zero register (hardwired to 0, writes are ignored)
• R1-R15: General Purpose registers

16-bit

• L0-L13: General Purpose long registers
• TR: 16-bit Trap Register
• PC: 16-bit Program Counter

Instruction Set

There are four instruction types, the S-type (set), R-type (register), L-type (long) and A-type (access), however R-, L- and A-type instructions are all encoded identically, the type just changes what register types the different instructions operate on.

S-type

[15:12]  [11:8]  [7:0]
  Opcode   TR      Value

R/L/A-type

[15:12]  [11:8]  [7:4]  [3:0]
  Opcode   TR/LT   AR     BR/LS

Instructions

Opcode	Mnemonic	Type	Description
0x0	SET	S-type	TR = Value
0x1	ADD	R-type	TR = AR + BR
0x2	SUB	R-type	TR = AR - BR
0x3	MUL	L-type	LT = AR * BR
0x4	DIV	L-type	LT = AR / BR | ((A % B) << 8)
0x5	AND	R-type	TR = AR & BR
0x6	BOR	R-type	TR = AR | BR
0x7	XOR	R-type	TR = AR ^ BR
0x8	SHL	R-type	TR = AR << BR
0x9	SHR	R-type	TR = AR >> BR
0xA	LOB	R-type	TR = RAM[AR:BR]
0xB	STB	R-type	RAM[TR:AR] = BR
0xC	JEQ	R-type	PC = TR:AR ifz BR
0xD	JNE	R-type	PC = TR:AR ifnz BR
0xE	LOL	A-type	TR = LSh; AR = LSl
0xF	STL	L-type	LT = AR:BR