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NoCArc@MICRO 2009: New York, NY, USA
- Maurizio Palesi, Shashi Kumar:
Second International Workshop on Network on Chip Architectures, NoCArc 2009, In conjunction with the 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42), December 12, 2009, New York, NY, USA. ACM 2009, ISBN 978-1-60558-774-5
Keynote talk
- Radu Marculescu:
Toward a science for future NoC design. 1
Router architectures & routing algorithms
- John Kim
, Hanjoon Kim:
Router microarchitecture and scalability of ring topology in on-chip networks. 5-10 - Ka-Ming Keung, Akhilesh Tyagi:
Breaking adaptive multicast deadlock by virtual channel address/data FIFO decoupling. 11-16 - Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro
Adaptive router architecture based on traffic behavior observability. 17-22 - Myong Hyon Cho, Mieszko Lis, Keun Sup Shim, Michel A. Kinsy, Srinivas Devadas:
Path-based, randomized, oblivious, minimal routing. 23-28
Design methodologies & mapping
- Daniele Ludovici, Alessandro Strano, Davide Bertozzi:
Architecture design principles for the integration of synchronization interfaces into Network-on-Chip switches. 31-36 - A. Dutta Choudhury, Gianluca Palermo
Yield enhancement by robust application-specific mapping on Network-on-Chips. 37-42 - Isask'har Walter, Israel Cidon, Avinoam Kolodny, Daniel Sigalov:
The era of many-modules SoC: revisiting the NoC mapping problem. 43-48
Low power techniques & performance evaluation
- Jesús Camacho Villanueva, José Flich
A performance evaluation of 2D-mesh, ring, and crossbar interconnects for chip multi-processors. 51-56 - Kyle C. Hale
Segment gating for static energy reduction in Networks-on-Chip. 57-62 - Liang Guang, Ethiopia Nigussie, Hannu Tenhunen:
System-level exploration of run-time clusterization for energy-efficient on-chip communication. 63-68
Emerging technologies & novel ideas
- Partha Pratim Pande, Amlan Ganguly, Kevin Chang, Christof Teuscher:
Hybrid wireless Network on Chip: a new paradigm in multi-core design. 71-76 - Kelli Ireland, Joseph Jezak, Steven P. Levitan, Donald M. Chiarulli:
Scalable arbitration of partitioned bus interconnection networks in 3D-IC systems. 77-82 - Christof Teuscher, Neha Parashar, Mrugesh Mote, Nolan Hergert, Jonathan Aherne:
Wire cost and communication analysis of self-assembled interconnect models for Networks-on-Chip. 83-88
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