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35th COMPCON 1990: San Francisco, California, USA
- Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, Compcon Spring '90, San Francisco, California, USA, February 26 - March 2, 1992, Digest of Papers. IEEE Computer Society 1990, ISBN 0-8186-2028-5
- Nobuo Uchida, M. Hirai, M. Yoshida, K. Hotta:
Fujitsu VP2000 series. 4-11 - K. G. Stevens Jr., Ron Sykora:
The CRAY Y-MP: a user's viewpoint. 12-15 - Donald R. Oestreicher:
The ES-1: a supercomputing architecture for the 1990s. 16-18 - Tom Blank:
The MasPar MP-1 architecture. 20-24 - John R. Nickolls:
The design of the MasPar MP-1: a cost effective massively parallel computer. 25-28 - Peter Christy:
Software to support massively parallel computing on the MasPar MP-1. 29-33 - Tryggve Fossum, David B. Fite:
Designing a VAX for high performance. 36-43 - John E. Murray, Ronald M. Salett, Ricky C. Hetherington, Francis X. McKeen:
Micro-architecture of the VAX 9000. 44-53 - Donald E. Marshall, James B. McElroy:
VAX 9000 packaging-the multi chip unit. 54-57 - Daniel Lenoski, Kourosh Gharachorloo, James Laudon, Anoop Gupta, John L. Hennessy, Mark Horowitz, Monica Lam:
Design of scalable shared-memory multiprocessors: the DASH approach. 62-67 - H. T. Kung:
High-speed networks for high-performance computing. 68-72 - Creve Maples, Larry D. Wittie:
MERLIN. A superglue for multicomputer systems. 73-81 - Olaf M. Lubeck:
A user's view of dataflow architectures. 84-87 - V. Gerald Grafe, Jamie E. Hoch:
The Epsilon-2 hybrid dataflow architecture. 88-93 - Jean-Luc Gaudiot, Liang-Teh Lee, Philippe Aubrée:
Data-driven approach for programming a transputer-based system. 94-99 - Bruce S. Davie:
Host interface design for experimental, very high-speed networks. 102-106 - John Croll:
VAX 6000 model 400 system overview. 110-114 - David M. Fenwick, John Redford, Tim Stanley, Douglas D. Williams:
A VLSI implementation of the VAX vector architecture. 115-119 - Dileep Bhandarkar, Richard Brunner:
Vector extensions to the VAX architecture. 120-126 - Bhagyam Moses, Karen DeGregory, Rajesh Kothari:
VAX 6000 Model 400 performance. 127-131 - Fred J. Pollack, Dave Johnson, Dave Carson, Ron Ebersole, Vittal Kini, Konrad Lai, Bernie Silvernail, Steve Stacey:
A VLSI-intensive fault-tolerant computer architecture. 134-142 - Fred J. Pollack, Kevin C. Kahn, T. Don Dennis, Gerald Holzhammer, Herman D'Hooge, Stephen Tolopka:
An object-oriented distributed operating system. 143-152 - Dileep Bhandarkar, David A. Orbits, Richard T. Witek, Wayne M. Cardoza, David N. Cutler:
High performance issue oriented architecture. 153-160 - Randy D. Groves, Richard R. Oehler:
An IBM second generation RISC processor architecture. 166-172 - H. B. Bakoglu, Gregory F. Grohoski, L. E. Thatcher, James A. Kahle, Charles R. Moore, David P. Tuttle, Warren E. Maule, W. R. Hardell Jr., Dwain A. Hicks, M. Nguyenphu, Robert K. Montoye, W. T. Glover, Sudhir Dhawan:
IBM second-generation RISC machine organization. 173-178 - James O. Nicholson, Fred E. Strietelmeier:
New micro channel features. 179-182 - Andreas von Bechtolsheim, Edward H. Frank:
Sun's SPARCstation 1: a workstation for the 1990s. 184-188 - Edward H. Frank:
The SBus: Sun's high performance system bus for RISC workstations. 189-194 - Curtis R. Priem:
Software in silicon: the methodology behind Sun's GX graphics accelerator architecture. 195-197 - Trevor G. Marshall:
Approaching the desktop supercomputer. 200-204 - Murray Egan:
Achieving supercomputer performance in a low pain environment. 205-207 - Craig Davidson:
Why MIPS aren't the point. 208-210 - Dennis R. Allison:
System issues in embedded control. 214-215 - Jerry Fiddler, David N. Wilner, Harvey Wong:
Multiprocessing: an extension of distributed, real-time computing. 216-218 - Dalibor F. Vrsalovic, Zary Segall, Jim Ready:
Is it possible to quantify the fault tolerance of distributed/parallel computer systems. 219-225 - David Roberts, Tim Layman, George Taylor:
An ECL RISC microprocessor designed for two level cache. 228-231 - Steve McGeady:
The i960CA SuperScalar implementation of the 80960 architecture. 232-240 - Mike Johnson:
RISC performance pushes back: A perspective on performance limits in general-purpose applications. 241-245 - Ken Shoemaker:
The i486 microprocessor integrated cache and bus interface. 248-253 - John Crawford:
The execution pipeline of the Intel i486 CPU. 254-258 - Bill Ledbetter, Ralph McGarity, Eric E. Quintana, Russel A. Reininger:
The 68040 integer and floating-point units. 259-263 - Robin W. Edenfield, Bill Ledbetter, Ralph McGarity:
The 68040 on-chip memory subsystem. 264-269 - Jerry Fiddler, Eric Stromberg, David N. Wilner:
Software considerations for real-time RISC. 274-277 - L. M. Thompson:
Using pSOS+ for embedded real-time computing. 282-288 - R. L. Cates, James J. Farrell III:
A RISC development case study. 290-294 - Brett Stewart:
New generations of the 29 K family solutions. 295-298 - T. Baker:
Headroom and legroom in the 80960 architecture. 299-306 - Michael J. Miller:
Designing embedded control applications with the IDT79R3001. 307-312 - Michael A. Dolan, Larry Hare:
X window system servers in embedded systems. 314-319 - Gordon L. Hanson, David W. Glidewell:
Microprocessor performance issues in non-impact printer applications. 320-323 - Barry D. Kurtz, Scott N. Woodfield, David W. Embley:
Object-oriented systems analysis and specification: a model-driven approach. 328-332 - Rafiul Ahad:
A methodology for design and documentation of persistent object bases of information systems. 333-339 - Kenneth S. Rubin:
Reuse in software engineering: an object-oriented perspective. 340-346 - Murthy Ganti, Pankaj Goyal, Rodolphe Nassif, Sunil Podar:
An object-oriented application development environment. 348-355 - Robert J. Evans:
An integrated C programming environment. 356-359 - William E. Weihl:
Using transactions in distributed applications. 366-371 - Alexander Schill:
Integrated support for distributed object-oriented applications. 372-379 - David Duis, Jeff Johnson:
Improving user-interface responsiveness despite performance limitations. 380-386 - Hassan Arafeh, Hasan S. Alkhatib, Hal T. Barraclough:
MOPPS: a scheme for managing parallel scientific programs in a distributed architecture. 387-394 - Mike Wilson:
Analysis vs. presentation in data visualization software. 396 - Steven S. Leung:
Organizing design alternatives using VHDL configurations. 398-402 - Alexander Miczo:
VHDL as a modeling-for-testability tool. 403-409 - LaNae J. Avra, Edward J. McCluskey:
Behavioral synthesis of testable systems with VHDL. 410-415 - Martin Freeman:
Emulating peripheral chips using a RISC core. 420-426 - Junien Labrousse, Gerrit A. Slavenburg:
CREATE-LIFE: a modular design approach for high performance ASICs. 427-433 - Pieter S. van der Meulen, Peter G. M. Baltus, Ross Morley:
AEDAM: design of high performance multi-process systems. 434-441 - Cynthia Wirtz:
CrossCheck: an ASIC testability solution. 444-448 - Samiha Mourad:
Sequential circuit testing. 449-454 - Rafic Z. Makki, J. Muha, Silvio Bou-Ghazale, T. Kaylani:
SSC-a tool for the synthesis of testable sequential machines. 455-461 - S. Kopec:
MAX EPLDs offer fast alternatives to ASICs. 464-469 - Dennis McCarty:
System development using Actel field programmable gate arrays. 470-476 - Wes Patterson:
Field programmable gate arrays get enough speed and density for computer applications. 477-480 - Hansjörg Zeller:
Parallel query execution in NonStop SQL. 484-487 - Donald J. Haderle:
Parallelism with IBM's relational Database2 (DB2). 488-489 - Goetz Graefe:
Parallelizing the Volcano database query processor. 490-493 - Jeffrey D. Ullman:
The theory of deductive database systems. 496-502 - Carlo Zaniolo:
Architecture of deductive database systems. 503-510 - Shalom Tsur:
Applications of deductive database systems. 511-518 - Hiroshi Ishikawa:
An object-oriented knowledge base approach to a next generation of hypermedia system. 520-527 - Mohammad A. Ketabchi, S. Mathur, Tore Risch, Jiun-Liang Chen:
Comparative analysis of RDBMS and OODBMS: a case study. 528-537 - Howard W. Beck, Shamkant B. Navathe:
Integrating natural language, query processing, and semantic data models. 538-543 - Michael Borrus:
HDTV is the slogan, high volume-high tech is the issue. 548-549 - Gerald M. Murch:
New paradigms for visualization. 550-551 - Gary Demos:
Increasing the human-computer bandwidth. 552-560 - Jim Lyon:
Tandem's remote data facility. 562-567 - D. L. Burkes, R. K. Treiber:
Design approaches for real-time transaction processing remote site recovery. 568-572 - Hector Garcia-Molina, Christos A. Polyzois:
Issues in disaster recovery. 573-577 - James C. Browne, K. Sridharan, J. Kiall, Carole Denton, William Eventoff:
Parallel structuring of real-time simulation programs. 580-584 - Bill Appelbe, Kevin Smith:
PAT: interactive conversion of sequential to parallel Fortran. 585-588 - Ted G. Lewis, W. G. Rudd:
Architecture of the Parallel Programming Support Environment. 589-594 - Alice J. Kelly:
In the beginning (mathematics courses). 598-599 - Rebecca A. Failor:
We're all the same (women in engineering). 600-602 - Donna K. Potter:
Corporate tactics which develop the engineering resource pool. 603-604 - Mark Cummings:
Pocket intelligence: the next plateau. 606-611 - Allen Becker:
Modern virtual screen technology and applications. 612-615 - Matthew Morgenstern:
The personal information revolution: from portable computing to the intelligent pocket assistant. 616-622 - Bron Nelson, Deb Caruso:
Practical parallel Fortran. 624-629 - David N. Glass:
Compile-time instruction scheduling for superscalar processors. 630-633 - Randy Allen:
Exploiting multiple granularities of parallelism in a compiler. 634-640
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