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14th SBCCI 2002: Porto Alegre, Brazil
- Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2002, Porto Alegre, Brazil, September 9-14, 2002. IEEE Computer Society 2002, ISBN 0-7695-1807-9
- Nadia Nedjah, Luiza de Macedo Mourelle:
Two Hardware Implementations for the Montgomery Modular Multiplication: Sequential versus Parallel. 3-8 - André Borin Soares, Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin:
Analysis and Implementation of a Stochastic Multiplier for Electrical Power Measurement. 9-13 - Eduardo Costa, Sergio Bampi, José Monteiro:
A New Architecture for 2's Complement Gray Encoded Array Multiplier. 14-19 - Ronald W. Mehler, Dian Zhou:
Architectural Synthesis of Finite Impulse Response Digital Filters. 20-28 - Ricardo N. B. Lima, Marcio N. Miranda, José V. S. Filho:
HW/SW Codesign of Handoff Protocol for Wireless ATM Networks Based on Performance Optimization Using Genetic Algorithm. 29-34 - José Antônio Gomes de Lima, Antonio Carlos Cavalcanti, Solon Ferreira de Lucena:
APU: Specification and Design of a Multi Algorithm ATM Policing Unit IP. 35-42 - Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhoven, S. Balakrishanan:
Multithreaded Architectural Support for Speculative Trace Scheduling in VLIW Processors. 43-48 - Manuel Lois Anido, Alexander Paar, Nader Bagherzadeh:
A Novel Method for Improving the Operation Autonomy of SIMD Processing Elements. 49-56 - Paulo Augusto Dal Fabbro, Carlos A. dos Reis Filho:
An Integrated CMOS Instrumentation Amplifier with Improved CMRR. 57-61 - Ricardo Doldán, Alberto Yúfera, Adoración Rueda:
A Continuous-Time Incremental Analog to Digital Converter. 62-67 - Joarez B. Monteiro, Antonio Petraglia, Carlos Azeredo Leme:
Capacitor Charge Control Technique Applied to Digitally Programmable IIR Switched-Capacitor Filter. 68-73 - Jacqueline S. Pereira, Fernando A. P. Barúqui, Antonio Petraglia:
Analog Decimator IC in Direct-form Polyphase Structure. 74-82 - Felipe S. Marques, Vinícius P. Correia, A. Prado, Marcelo Lubaszewski, André Inácio Reis:
Testability Properties of BDDs. 83-88 - Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero:
Reducing Test Application Time through Interleaved Scan. 89-94 - Renato Fernandes Hentschke, Felipe S. Marques, Fernanda Lima, Luigi Carro, Altamiro Amadeu Susin, Ricardo Reis:
Analyzing Area and Performance Penalty of Protecting Different Digital Modules with Hamming Code and Triple Modular Redundancy. 95-100 - Bogdan Nicolescu, Raoul Velazco, Matteo Sonza Reorda, Maurizio Rebaudengo, Massimo Violante:
A Software Fault Tolerance Method for Safety-Critical Systems: Effectiveness and Drawbacks. 101-108 - Cristiano C. de Araújo, Edna Barros:
Interface Generation for Concurrent Processes During Hardware/Software Co-synthesis. 109-114 - Alexandre M. Amory, Fernando Moraes, Leandro A. Oliveira, Ney Calazans, Fabiano Hessel:
A Heterogeneous and Distributed Co-Simulation Environment. 115-120 - Cesar A. Zeferino, Márcio Eduardo Kreutz, Luigi Carro, Altamiro Amadeu Susin:
A Study on Communication Issues for Systems-on-Chip. 121-126 - Rafael C. Krapf, Júlio C. B. de Mattos, Gustavo Spellmeier, Luigi Carro:
A Study on a Garbage Collector for Embedded Applications. 127-134 - M. G. C. Flores, Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin:
A Noise Generator for Analog-to-Digital Converter Testing. 135-140 - Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin:
A Statistical Sampler for Increasing Analog Circuits Observability. 141-148 - João M. S. Alcântara, Antônio C. C. Vieira, Federico Gálvez-Durand, Vladimir Castro Alves:
A Methodology for Dynamic Power Consumption Estimation Using VHDL Descriptions. 149-154 - Alberto García Ortiz, Tudor Murgan, Leandro Soares Indrusiak, Manfred Glesner:
Power Consumption in Point-to-Point Interconnect Architectures. 155-162 - Sandro Sawicki, Lisane B. de Brisolara, Leandro S. lndrusiak, Ricardo Reis:
Collaborative Design Using a Shared Object Spaces Infrastructure. 163-168 - Raúl Acosta, Fernando Silveira, Pablo Aguirre:
Experiences on Analog Circuit Technology Migration and Reuse. 169-176 - Marcos R. Boschetti, Alexandro M. S. Adário, Ivan Saraiva Silva, Sergio Bampi:
Techniques and Mechanisms for Dynamic Reconfiguration in an Image Processor. 177-182 - José Carlos S. Palma, Aline Vieira de Mello, Leandro Möller, Fernando Moraes, Ney Calazans:
Core Communication Interface for FPGAs. 183-190 - Anderson Cattelan Zigiotto, Roberto d'Amore:
A Low-Cost FPGA Implementation of the Advanced Encryption Standard Algorithm. 191-196 - Alex Panato, Marcelo Barcelos, Ricardo Reis:
An IP of an Advanced Encryption Standard for Altera" Devices. 197-202 - Luciano Volcan Agostini, Ivan Saraiva Silva, Sergio Bampi:
Pipelined Entropy Coders for JPEG Compression. 203-208 - Rafael C. Krapf, Júlio C. B. de Mattos, Gustavo Spellmeier, Luigi Carro:
Signal Processing Applications for Embedded Java Systems. 209-216 - João Martins, Marius Strum:
Power Management Exploration for a Block Turbo Decoder. 217-220 - Júlio C. B. de Mattos, Márcio Eduardo Kreutz, Luigi Carro:
Low-Power Control Architecture for Embedded Processors. 221-228 - Wagner Luiz Alves de Oliveira, Norian Marranghello, Furio Damiani:
Exception Handling with Petri Net for Digital Systems. 229-234 - Paulo Sérgio B. do Nascimento, Manoel Eusébio de Lima, Paulo Maciel:
CDFG -Petri Net Temporal Partitioning for Switching Context Applications. 235-242 - Luis Henrique de Carvalho Ferreira, Robson L. Moreno, Tales C. Pimenta, Carlos A. R. Filho:
An Offset Self-Correction Sample and Hold Circuit for Precise Applications in Low Voltage CMOS. 243-246 - Fernando Silveira, Denis Flandre:
Operational Amplifier Power Optimization for a Given Total (Slewing plus Linear) Settling Time. 247-253 - Luís Cléber C. Marques, Wouter A. Serdijn, Carlos Galup-Montoro, Márcio C. Schneider:
A Switched-MOSFET Programmable Low-Voltage Filter. 254-257 - Fathi A. Farag:
Low-Voltage ADC for Sample to Serial Interface Applications. 258-264 - João Daniel Togni, Felipe Ribeiro Schneider, Vinícius P. Correia, Renato P. Ribas, André Inácio Reis:
Automatic Generation of Digital Cell Libraries. 265-270 - Marcelo de Oliveira Johann, Glauco Borges Valim dos Santos, Ricardo Augusto da Luz Reis:
A LEGAL Algorithm Following Global Routing. 271-276 - Gustavo Wilke, José Luís Güntzel, Márcio Bystronski, Ana Cristina Medina Pinto, Ricardo Reis:
Finding the Critical Delay of Combinational Blocks by Floating Vector Simulation and Path Tracing. 277-282 - Vinícius Pazutti Correia, André Inácio Reis:
Compression and Technology Mapping of Logic Circuits. 283-288 - Henrique Costa de Moura Santos, Ana Isabela Araújo Cunha:
CMOS OTA Sizing Using ACM Model in a Graphical Approach. 289-295 - Valdinei Luís Belini, M. A. Romero:
Design of Active Inductors Using CMOS Technology. 296-301 - Carlos P. Coelho, Joel R. Phillips, L. Miguel Silveira:
On Generating Compact, Passive Models of Frequency-Described Systems. 302-307 - Ahmed Fakhfakh, Hervé Levi, Noëlle Milet-Lewis, Yves Danto:
Behavioral Modeling of Analogue and Mixed Integrated Systems with VHDL-AMS for RF Applications. 308-316 - Niels Vanspauwen, Edna Barros, Sérgio Cavalcante, Carlos Valderrama:
On the Importance, Problems and Solutions of Pointer Synthesis. 317-322 - César Augusto Missio Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes:
Requirements, Primitives and Models for Systems Specification. 323-330 - Fábio da S. Dutra, Federico Gálvez-Durand, Vladimir Castro Alves:
System on a Chip for Petroleum Pipeline Inspection. 331-336 - Gerd Kreiselmaier, Timo Vogt, Norbert Wehn, Friedbert Berens:
Combined Turbo and Convolutional Decoder Architecture for UMTS Wireless Applications. 337-344 - João Paulo Cerquinho Cajueiro, Carlos A. dos Reis Filho:
CMOS Bandgap with Base-Current Thermal Compensation. 345-349 - David Deschans, Jean-Baptiste Bégueret, Yann Deval, Christophe Scarabello, Pascal Fouillat, Guy Montignac, Alain Baudry:
A 4 Gsamples/S with 2-4 GHz Input Bandwidth SIGE Digitizer for Radio Astronomy Applications. 350-358 - Görschwin Fey, Rolf Drechsler:
Minimizing the Number of Paths in BDDs. 359-364 - Peter Glösekötter, Christian Pacha, Karl F. Goser, Werner Prost, Samuel O. Kim, Holger van Husen, Thorsten Reimann, Franz-Josef Tegude:
Asynchronous Circuit Design Based on the RTBT Monostable-Bistable Logic Transition Element (MOBILE). 365-372 - Miguel Miranda, C. Ghez, Erik Brockmeyer, Pieter Op de Beeck, Francky Catthoor:
Data Transfer and Storage Exploration for Real-Time Implementation of a Digital Audio Broadcast Receiver on a Trimedia Processor. 373-378 - Jürgen Becker:
Configurable Systems-on-Chip (CSoC). 379-384 - Michel Renovell:
A Structural Test Methodology for SRAM-Based FPGAs. 385 - Jan M. Rabaey:
Ultra Low-Energy Transceivers for Wireless Sensor Networks. 386 - Jochen A. G. Jess:
Parametric Yield Estimation for Deep Sub- Micron VLSI Circuits. 387
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