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Kazunori Watanabe
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2010 – 2019
- 2014
- [j4]Xin Zhang, Po-Hung Chen, Yasuyuki Okuma, Koichi Ishida, Yoshikatsu Ryu, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya:
A 0.6 V Input CCM/DCM Operating Digital Buck Converter in 40 nm CMOS. IEEE J. Solid State Circuits 49(11): 2377-2386 (2014) - [j3]Shunta Iguchi, Akira Saito, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya:
Design Method of Class-F Power Amplifier With Output Power of -20 dBm and Efficient Dual Supply Voltage Transmitter. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(10): 2978-2986 (2014) - 2013
- [c9]Shunta Iguchi, Akira Saito, Kentaro Honda, Yun Fei Zheng, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya:
315MHz OOK transceiver with 38-µW receiver and 36-µW transmitter in 40-nm CMOS. ASP-DAC 2013: 93-94 - [c8]Xin Zhang, Po-Hung Chen, Yoshikatsu Ryu, Koichi Ishida, Yasuyuki Okuma, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya:
A low voltage buck DC-DC converter using on-chip gate boost technique in 40nm CMOS. ASP-DAC 2013: 109-110 - 2012
- [j2]Xin Zhang, Yu Pu, Koichi Ishida, Yoshikatsu Ryu, Yasuyuki Okuma, Po-Hung Chen, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya:
A 1-V-Input Switched-Capacitor Voltage Converter With Voltage-Reference-Free Pulse-Density Modulation. IEEE Trans. Circuits Syst. II Express Briefs 59-II(6): 361-365 (2012) - [c7]Shunta Iguchi, Akira Saito, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya:
2.1 Times increase of drain efficiency by dual supply voltage scheme in 315MHz class-F Power amplifier at output power of -20dBm. ESSCIRC 2012: 345-348 - [c6]Akira Saito, Yun Fei Zheng, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya:
0.35V, 4.1μW, 39MHz crystal oscillator in 40nm CMOS. ISLPED 2012: 333-338 - [c5]Akira Saito, Kentaro Honda, Yun Fei Zheng, Shunta Iguchi, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya:
An all 0.5V, 1Mbps, 315MHz OOK transceiver with 38-µW career-frequency-free intermittent sampling receiver and 52-µW class-F transmitter in 40-nm CMOS. VLSIC 2012: 38-39 - [c4]Xin Zhang, Po-Hung Chen, Yoshikatsu Ryu, Koichi Ishida, Yasuyuki Okuma, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya:
A 0.45-V input on-chip gate boosted (OGB) buck converter in 40-nm CMOS with more than 90% efficiency in load range from 2µW to 50µW. VLSIC 2012: 194-195 - 2011
- [j1]Yasuyuki Okuma, Koichi Ishida, Yoshikatsu Ryu, Xin Zhang, Po-Hung Chen, Kazunori Watanabe, Makoto Takamiya, Takayasu Sakurai:
0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS. IEICE Trans. Electron. 94-C(6): 938-944 (2011) - 2010
- [c3]Yasuyuki Okuma, Koichi Ishida, Yoshikatsu Ryu, Xin Zhang, Po-Hung Chen, Kazunori Watanabe, Makoto Takamiya, Takayasu Sakurai:
0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS. CICC 2010: 1-4
1990 – 1999
- 1998
- [c2]Kazunori Watanabe, Isamu Yoshii, Ryuji Kohno:
An adaptive array antenna using combined DFT and LMS algorithms. PIMRC 1998: 1417-1421
1980 – 1989
- 1984
- [c1]Shigeru Tachigami, Shozo Inao, Hisaharu Yanagawa, Kazunori Watanabe, Yoshio Tsuchida, Isao Minamida:
Splicing of Single-Mode Optical Fibers and Jointing of Fiber Cables. ICC (3) 1984: 1080-1083
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