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Marie-Minerve Louërat
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- affiliation: Sorbonne Université Paris, France
- affiliation: Université Pierre et Marie Curie, Paris, France
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2020 – today
- 2024
- [c51]A. Sayed, Michel Vasilevski, M. T. Abdelmomen, Shadi Turk, Ahmed A. Ghoniem, C. Perez, C. Voillequin, Haralampos-G. Stratigopoulos, Marie-Minerve Louërat, E. Wantiez, Hassan Aboushady:
A 10.8GS/s, 84MHz-BW RF Bandpass ΣΔ ADC with a 89dB-SFDR and a 62dB-SNDR for LTE/5G Receivers. VLSI Technology and Circuits 2024: 1-2 - 2022
- [j13]Mohamed Elshamy
, Giorgio Di Natale
Digital-to-Analog Hardware Trojan Attacks. IEEE Trans. Circuits Syst. I Regul. Pap. 69(2): 573-586 (2022) - [c50]Mariam Tlili, Alhassan Sayed, Doaa Mahmoud, Marie-Minerve Louërat, Hassan Aboushady
Anti-Piracy of Analog and Mixed-Signal Circuits in FD-SOI. ASP-DAC 2022: 423-428 - [c49]Antonios Pavlidis, Eric Faehn, Marie-Minerve Louërat, Haralampos-G. Stratigopoulos:
Run-Time Hardware Trojan Detection in Analog and Mixed-Signal ICs. VTS 2022: 1-8 - 2021
- [j12]Julian Leonhard, Alhassan Sayed
Analog and Mixed-Signal IC Security via Sizing Camouflaging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(5): 822-835 (2021) - [j11]Antonios Pavlidis
SymBIST: Symmetry-Based Analog and Mixed-Signal Built-In Self-Test for Functional Safety. IEEE Trans. Circuits Syst. I Regul. Pap. 68(6): 2580-2593 (2021) - [j10]Mohamed Elshamy
Locking by Untuning: A Lock-Less Approach for Analog and Mixed-Signal IC Security. IEEE Trans. Very Large Scale Integr. Syst. 29(12): 2130-2142 (2021) - [c48]Julian Leonhard, Mohamed Elshamy, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos:
Breaking Analog Biasing Locking Techniques via Re-Synthesis. ASP-DAC 2021: 555-560 - [c47]Antonios Pavlidis, Eric Faehn, Marie-Minerve Louërat, Haralampos-G. Stratigopoulos:
BIST-Assisted Analog Fault Diagnosis. ETS 2021: 1-6 - 2020
- [j9]Mehdi Terosiet, Eldar Zianbetov, Farouk Vallette, Marie-Minerve Louërat, Patrick Garda, Dimitri Galayko, Sylvain Feruglio
A comprehensive in-depth study of tri-state inverter based DCO. Microelectron. J. 99: 104760 (2020) - [j8]Fikre Tsigabu Gebreyohannes
A gm/ID Methodology Based Data-Driven Search Algorithm for the Design of Multistage Multipath Feed-Forward-Compensated Amplifiers Targeting High Speed Continuous-Time ΣΔ-Modulators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4311-4324 (2020) - [j7]Alhassan Sayed
A 1.5-to-3.0GHz Tunable RF Sigma-Delta ADC With a Fixed Set of Coefficients and a Programmable Loop Delay. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1559-1563 (2020) - [c46]Mohamed Elshamy, Alhassan Sayed, Marie-Minerve Louërat, Amine Rhouni, Hassan Aboushady
Securing Programmable Analog ICs Against Piracy. DATE 2020: 61-66 - [c45]Antonios Pavlidis, Marie-Minerve Louërat, Eric Faehn, Anand Kumar, Haralampos-G. D. Stratigopoulos:
Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP. DATE 2020: 282-285 - [c44]Mohamed Elshamy, Giorgio Di Natale, Antonios Pavlidis, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos:
Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism. ETS 2020: 1-6 - [c43]François Pêcheux, Liliana Andrade, Marie-Minerve Louërat, Ilias Bournias, Roselyne Chotin, Daniela Genius:
Virtual Prototyping of Open Source Heterogeneous Systems with an Open Source Framework Featuring SystemC MDVP Extensions. FDL 2020: 1-8
2010 – 2019
- 2019
- [c42]Julian Leonhard, Muhammad Yasin
MixLock: Securing Mixed-Signal Circuits via Logic Locking. DATE 2019: 84-89 - [c41]Fikre Tsigabu Gebreyohannes
Design of a 4th-Order Feed-Forward-Compensated Operational Amplifier for Multi-GHz Sampling Frequency Continuous-Time Bandpass Sigma-Delta Modulators. ISCAS 2019: 1-5 - [c40]Julian Leonhard, Marie-Minerve Louërat, Hassan Aboushady, Ozgur Sinanoglu
Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application. SMACD 2019: 185-188 - 2018
- [c39]Naohiko Shimizu, Junichi Akita, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos, Jean-Paul Chaput, Dimitri Galayko:
Open Source Hardware and EDA Tools for Analog/Mixed-Signal Design and Prototyping. ISCAS 2018: 1-5 - 2016
- [j6]Hao Zou
Using CAD Tool for Substrate Parasitic Modeling in Smart Power Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(12): 2323-2333 (2016) - [c38]Eric Lao, Marie-Minerve Louërat, Jean-Paul Chaput:
Semi-automated analog placement. ICECS 2016: 432-433 - [c37]Yasser Moursy, Raouf Khalil, Sergio Lecce, Vanni Poletto, Ramy Iskander, Marie-Minerve Louërat:
Mixed-signal PI controller in current-mode DC-DC buck converter for automotive applications. ISCAS 2016: 1610-1613 - [c36]Hao Zou, Yasser Moursy, Ramy Iskander, Jean-Paul Chaput, Marie-Minerve Louërat:
An adaptive mesh refinement strategy of substrate modeling for smart power ICs. ISCAS 2016: 2358-2361 - 2015
- [j5]Martin Barnasconi, Manfred Dietrich, Karsten Einwich, Thilo Vörtler, Jean-Paul Chaput, Marie-Minerve Louërat, François Pêcheux, Zhi Wang, Philippe Cuenot, Ingmar Neumann, Thang Nguyen, Ronan Lucas, Emmanuel Vaumorin:
UVM-SystemC-AMS Framework for System-Level Verification and Validation of Automotive Use Cases. IEEE Des. Test 32(6): 76-86 (2015) - [j4]Akram Malak, Yao Li, Ramy Iskander, François Durbin, Farakh Javid
Fast multidimensional optimization of analog circuits initiated by monodimensional global Peano explorations. Integr. 48: 198-212 (2015) - [j3]Raouf Khalil, Marie-Minerve Louërat, Roger Petigny
Background analog and mixed signal calibration system for time-interleaved ADC. Microelectron. J. 46(7): 656-667 (2015) - [j2]Hussein Adel, Marc Sabut, Marie-Minerve Louërat:
Split ADC Based Fully Deterministic Multistage Calibration for High Speed Pipeline ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(6): 1481-1488 (2015) - [c35]Liliana Andrade, Torsten Maehne, Alain Vachoux, Cédric Ben Aoun, François Pêcheux, Marie-Minerve Louërat:
Pre-simulation symbolic analysis of synchronization issues between discrete event and timed data flow models of computation. DATE 2015: 1671-1676 - [c34]Hussein Adel, Marc Sabut, Marie-Minerve Louërat:
1.1-V 200 MS/s 12-bit digitally calibrated pipeline ADC in 40 nm CMOS. ISCAS 2015: 2281-2284 - [c33]Cédric Ben Aoun, Liliana Andrade, Torsten Mähne, François Pêcheux, Marie-Minerve Louërat, Alain Vachoux:
Pre-simulation elaboration of heterogeneous systems: The SystemC multi-disciplinary virtual prototyping approach. SAMOS 2015: 278-285 - 2014
- [c32]Torsten Maehne, Zhi Wang, Benoit Vernay
UVM-SystemC-AMS based framework for the correct by construction design of MEMS in their real heterogeneous application context. ICECS 2014: 862-865 - [c31]Hussein Adel, Marc Sabut, Roger Petigny, Marie-Minerve Louërat:
Split ADC digital background calibration for high speed SHA-less pipeline ADCs. ISCAS 2014: 1143-1146 - [c30]Yao Li, Ramy Iskander, Marie-Minerve Louërat:
Modeling, design and verification platform using SystemC AMS. ISQED 2014: 39-46 - 2013
- [j1]Ramy Iskander, Marie-Minerve Louërat, Andreas Kaiser
Hierarchical sizing and biasing of analog firm intellectual properties. Integr. 46(2): 172-188 (2013) - [c29]Farakh Javid, Ramy Iskander, Marie-Minerve Louërat, François Durbin:
A structured DC analysis methodology for accurate verification of analog circuits. ISCAS 2013: 2662-2665 - [c28]Hussein Adel, Marie-Minerve Louërat, Marc Sabut:
Design considerations for low gain amplifier in the MDAC of digitally calibrated pipelined ADCs. VLSI-SoC 2013: 23-26 - 2012
- [c27]Antoine Lévêque, François Pêcheux, Marie-Minerve Louërat, Hassan Aboushady, Fabio Cenni, Serge Scotti, Abdelbasset Massouri, Laurent Clavier
Holistic modeling of embedded systems with multi-discipline feedback: Application to a Precollision Mitigation Braking System. DATE 2012: 739-744 - [c26]Yao Li, Ramy Iskander, Farakh Javid, Marie-Minerve Louërat:
A unified platform for design and verification of mixed-signal systems based on SystemC AMS. FDL 2012: 75-82 - [c25]Yao Li, Ramy Iskander, Farakh Javid, Marie-Minerve Louërat:
A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS. FDL (Selected Papers) 2012: 89-108 - [c24]Raouf Khalil, Marie-Minerve Louërat, Roger Petigny, Hugo Gicquel:
Background time skew calibration for time-interleaved ADC using phase detection method. NEWCAS 2012: 257-260 - 2011
- [c23]Stephanie Youssef, Farakh Javid, Damien Dupuis, Ramy Iskander, Marie-Minerve Louërat:
A seamless representation for coupling transistor sizing with nanometric CMOS layout generation. ECCTD 2011: 341-344 - [c22]Stephanie Youssef, Farakh Javid, Damien Dupuis, Ramy Iskander, Marie-Minerve Louërat:
A Python-based layout-aware analog design methodology for nanometric technologies. IDT 2011: 62-67 - 2010
- [c21]Antoine Lévêque, François Pêcheux, Marie-Minerve Louërat, Hassan Aboushady, Michel Vasilevski:
SystemC-AMS Models for Low-Power Heterogeneous Designs: Application to a WSN for the Detection of Seismic Perturbations. ARCS Workshops 2010: 205-210 - [c20]Stephanie Youssef, Damien Dupuis, Ramy Iskander, Marie-Minerve Louërat:
Automatic stress effects computation based on a layout generation tool for analog IC. BMAS 2010: 7-12 - [c19]Abdelbasset Massouri, Antoine Lévêque, Laurent Clavier
Baseband fading channel simulator for Inter-Vehicle Communication using SystemC-AMS. BMAS 2010: 36-41 - [c18]Wagdy M. Gaber, Mootaz Allam, Hassan Aboushady, Marie-Minerve Louërat, El-Sayed Eid:
Systematic design of continuous-time ΣΔ modulator with VCO-based quantizer. ISCAS 2010: 29-32 - [c17]Hussein Adel, Mohamed Dessouky, Marie-Minerve Louërat, Hugo Gicquel, Hisham Haddara:
Foreground digital calibration of non-linear errors in pipelined A/D converters. ISCAS 2010: 569-572
2000 – 2009
- 2009
- [c16]Farakh Javid, Ramy Iskander, Marie-Minerve Louërat:
Simulation-based hierarchical sizing and biasing of analog firm IPs. BMAS 2009: 43-48 - [c15]Diomadson Belfort, Nicolas Beilleau, Hassan Aboushady
A Q-enhanced LC bandpass filter using CAIRO+. ICECS 2009: 860-863 - [c14]Michel Vasilevski, Hassan Aboushady
Automatic Model Refinement of GmC Integrators for High-level Simulation of Continuous-time Sigma-Delta Modulators. ISCAS 2009: 2769-2772 - 2007
- [c13]Ramy Iskander, Marie-Minerve Louërat, Andreas Kaiser:
Systematic Offset Detection and Evaluation Using Hierarchical Graph-Based Sizing and Biasing. ICECS 2007: 170-173 - 2006
- [c12]Laurent de Lamarre, Marie-Minerve Louërat, Andreas Kaiser
Optimizing Resistances and Capacitances of a Continuous-Time ΣΔ ADC. ICECS 2006: 419-422 - 2005
- [c11]DiaaEldin Khalil, Mohamed Dessouky, Vincent Bourguet, Marie-Minerve Louërat, Andreia Cathelin, Hani F. Ragai
Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid Capacitor Arrays. ISQED 2005: 143-147 - 2004
- [c10]Hassan Aboushady, Laurent de Lamarre, Nicolas Beilleau, Marie-Minerve Louërat:
Automatic Synthesis and Simulation of Continuous-Time [Sigma-Delta] Modulators. DATE 2004: 674-675 - [c9]Marie-Minerve Louërat, Tuong P. Nguyen, Vincent Bourguet, Laurent de Lamarre, Alain Greiner:
A language to desing generators of analog functions (poster). FDL 2004: 30-32 - [c8]Hassan Aboushady
Loop delay compensation in bandpass continuous-time Sigma Delta modulators without additional feedback coefficients. ISCAS (1) 2004: 1124-1127 - 2002
- [c7]Hassan Aboushady
Systematic approach for discrete-time to continuous-time transformation of Sigma-Delta modulators. ISCAS (4) 2002: 229-232 - 2001
- [c6]Mohamed Dessouky, Andreas Kaiser
Analog design for reuse - case study: very low-voltage sigma-delta modulator. DATE 2001: 353-360 - [c5]Hassan Aboushady
Systematic design of high-linearity current-mode integrators for low-power continuous-time ΣΔ modulators. ICECS 2001: 963-966 - [c4]Mohamed Dessouky, Marie-Minerve Louërat, Andreas Kaiser:
Switch sizing for very low-voltage switched-capacitor circuits. ICECS 2001: 1549-1552 - [c3]Hassan Aboushady
Low-power design of low-voltage current-mode integrators for continuous-time Sigma-Delta modulators. ISCAS (1) 2001: 276-279 - 2000
- [c2]Mohamed Dessouky, Marie-Minerve Louërat, Jacky Porte:
Layout-Oriented Synthesis of High Performance Analog Circuits. DATE 2000: 53-57 - [c1]Mohamed Dessouky, Marie-Minerve Louërat:
A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits. ISQED 2000: 291-298
Coauthor Index
Haralampos-G. D. Stratigopoulos
aka: Haralampos-G. Stratigopoulos
aka: Haralampos-G. Stratigopoulos
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last updated on 2024-10-21 20:24 CEST by the dblp team
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