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Andreia Cathelin
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2020 – today
- 2024
- [j37]Deni Germano Alves Neto
, Mohamed Khalil Bouchoucha
Design-Oriented Single-Piece 5-DC-Parameter MOSFET Model. IEEE Access 12: 87420-87437 (2024) - [j36]Julien Poupon, Manuel J. Barragan Asian, Andreia Cathelin, Sylvain Bourdel:
Design-Oriented Single-Piece Explicit I-V DC Charge-Based Model for MOS Transistors in Nanometric Technologies. IEEE Access 12: 147809-147827 (2024) - [j35]Lili Chen
A High-Efficiency High-Power 170-176-GHz Frequency Stabilized Quadrature Radiator. IEEE J. Solid State Circuits 59(1): 243-252 (2024) - [j34]Lili Chen
A Fast Back-to-Lock DPLL-Based 192-210-GHz Chirp Generator With +5.9-dBm Peak Output Power for Sub-THz Imaging and Sensing. IEEE J. Solid State Circuits 59(5): 1461-1474 (2024) - [c85]Julien Poupon
Dynamic Analysis of RF CMOS Inverter-Based Ring Oscillators using an All-Region MOSFET Charge-Based Model in 28nm FD-SOI CMOS. ISCAS 2024: 1-5 - [c84]S. M. Hossein Naghavi, Morteza Tavakoli Taba, Amirata Tabatabavakili, Ali Mostajeran, Mohammed Aseeri, Andreia Cathelin, Ehsan Afshari:
24.4 Sub-THz Ruler: Spectral Bistability in a 235GHz Self-Injection-Locked Oscillator for Agile and Unambiguous Ranging. ISSCC 2024: 418-420 - [c83]Joaquin Cornejo, Filipe Pouget, Sylvain Clerc, Tifenn Hirtzlin, Benoit Larras, Andreia Cathelin, Antoine Frappé:
Exploration of Low-Energy Floating-Point Flash Attention Mechanism for 18nm FD-SOI CMOS Integration at the Edge. MWSCAS 2024: 1056-1059 - 2023
- [j33]Dayana A. Pino-Monroy
Corrections to "Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge". IEEE Access 11: 39650 (2023) - [c82]Lili Chen
A Low-Power 20Gb/s 196GHz BPSK Wireless Transmitter with Energy Efficiency FoM of 0.15pJ/bit/cm. CICC 2023: 1-2 - [c81]Bahareh Hadidian, Farzad Khoeini, S. M. Hossein Naghavi
A 194-238GHz Fully On-Chip Self-Referenced Frequency Stabilized Radiator for High Range Resolution Imaging. CICC 2023: 1-2 - [c80]Morteza Tavakoli Taba, S. M. Hossein Naghavi
A Compact CMOS 363 GHz Autodyne FMCW Radar with 57 GHz Bandwidth for Dental Imaging. CICC 2023: 1-2 - [c79]Andres Asprilla, Andreia Cathelin, Yann Deval:
0.45-mW 2.35-3.0 GHz Multiplying DLL with Calibration Loop in 28nm CMOS FD-SOI. ESSCIRC 2023: 269-272 - [c78]Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé:
A 291nW Real-Time Event-Driven Spectrogram Extraction unit in 28nm FD-SOI CMOS for Keyword Spotting Application. ESSCIRC 2023: 341-344 - [c77]Mohamed Khalil Bouchoucha
A wideband sub-6GHz continuously tunable gm-boosted CG Low Noise Amplifier in 28 nm FD-SOI CMOS technology. ESSCIRC 2023: 381-384 - [c76]Morteza Tavakoli Taba, S. M. Hossein Naghavi
A 53-62 GHz Two-channel Differential 6-bit Active Phase Shifter in 55-nm SiGe Technology. ESSCIRC 2023: 445-448 - [c75]Mohamed Khalil Bouchoucha
Performance benchmark of State-of-the-art Sub-6-GHz wideband LNAs Based on an Extensive Survey. ISCAS 2023: 1-5 - [c74]Mohamed Khalil Bouchoucha
Resistive Feedback LNA design using a 7-parameter design-oriented model for advanced technologies. ISCAS 2023: 1-5 - [c73]Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha
Design-oriented model for short-channel MOS transistors based on inversion charge. LASCAS 2023: 1-4 - [c72]Youssef Bendou, Martin Rack, Dimitri Lederer, Andreia Cathelin, Jean-Pierre Raskin:
Substrate noise mitigation using high resistivity base silicon wafer for a 14 GHz VCO on 28 nm FD-SOI. NEWCAS 2023: 1-5 - [c71]Denis Flores, Dominique Dallet, Andrei Vladimirescu, Andreia Cathelin, Yann Deval:
High-Resolution Fractional Digital Frequency Divider using a Binary-Rate Multiplier. NEWCAS 2023: 1-5 - [c70]Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé:
Low-Power Event-Driven Spectrogram Extractor for Multiple Keyword Spotting: A proof of concept. NEWCAS 2023: 1-5 - [c69]Deni Germano Alves Neto
A 5-DC-parameter MOSFET model for circuit simulation in QucsStudio and SPECTRE. NEWCAS 2023: 1-5 - [c68]Nicolas Grossier, Fabio Disegni, A. Ventre, A. Barcella, R. Mariani, V. Marino, S. Mazzara, A. Scavuzzo, M. Bansal, B. Soni, A. Anand, S. Banzal, D. Joshi, R. Narwal, M. Niranjani, K. Trivedi, P. Ferreira, Rossella Ranica, L. Vullo, Andreia Cathelin, Alfonso Maurelli, S. Pezzini, M. Peri:
ASIL-D automotive-grade microcontroller in 28nm FD-SOI with full-OTA capable 21MB embedded PCM memory and highly scalable power management. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j32]Dayana A. Pino-Monroy
Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge. IEEE Access 10: 86270-86285 (2022) - [j31]Guillaume Tochou
A Sub-100-μW 0.1-to-27-Mb/s Pulse-Based Digital Transmitter for the Human Intranet in 28-nm FD-SOI CMOS. IEEE J. Solid State Circuits 57(5): 1409-1420 (2022) - [j30]Christopher Sutardja
Multi-Watt-Level 4.9-GHz Silicon Power Amplifier for Portable Thermoacoustic Imaging. IEEE J. Solid State Circuits 57(5): 1421-1431 (2022) - [j29]Bahareh Hadidian
A 220-GHz Energy-Efficient High-Data-Rate Wireless ASK Transmitter Array. IEEE J. Solid State Circuits 57(6): 1623-1634 (2022) - [j28]Guillaume Tochou
Impact of Forward Body-Biasing on Ultra-Low Voltage Switched-Capacitor RF Power Amplifier in 28 nm FD-SOI. IEEE Trans. Circuits Syst. II Express Briefs 69(1): 50-54 (2022) - [c67]Emilio Calvanese Strinati, Michaël Peeters
The Hardware Foundation of 6G: The NEW-6G Approach. EuCNC 2022: 423-428 - [c66]G. Diverrez
A 24-31GHz 28nm FD-SOI CMOS Power Amplifier Supporting 5G NR FR2 64-QAM Signals. ICECS 2022 2022: 1-4 - [c65]Andres Asprilla, Andreia Cathelin, Yann Deval:
Highly Linear Large Signal Compact Voltage-to-Current Converter in 28 nm FD-SOI Technology. LASCAS 2022: 1-4 - [d1]Mohamed Khalil Bouchoucha, Mathieu Coustans, Manuel J. Barragán
A Survey on Sub-6 GHz Wideband LNAs for Ultra- Low-Power IoT applications. IEEE DataPort, 2022 - 2021
- [j27]Mohammadreza Dolatpoor Lakeh
An Ultrafast Active Quenching Active Reset Circuit with 50% SPAD Afterpulsing Reduction in a 28 nm FD-SOI CMOS Technology Using Body Biasing Technique. Sensors 21(12): 4014 (2021) - [c64]Soufiane Mourrane, Benoit Larras, Andreia Cathelin, Antoine Frappé
Event-Driven Continuous-Time Feature Extraction for Ultra Low-Power Audio Keyword Spotting. AICAS 2021: 1-4 - [c63]Bahareh Hadidian, Farzad Khoeini, S. M. Hossein Naghavi
An Energy Efficient Fully Integrated 20Gbps OOK Wireless Transmitter at 220GHz. CICC 2021: 1-2 - [c62]Joël Hartmann, Paolo Cappelletti, Nitin Chawla, Franck Arnaud, Andreia Cathelin:
Artificial Intelligence: Why moving it to the Edge? ESSCIRC 2021: 1-6 - [c61]Naftali Weiss, Gregory Cooke, Peter Schvan, Pascal Chevalier, Andreia Cathelin, Sorin P. Voinigescu:
200-GS/s ADC Front-End Employing 25% Duty Cycle Quadrature Clock Generator. ESSCIRC 2021: 483-486 - [c60]Joël Hartmann, Paolo Cappelletti, Nitin Chawla, Franck Arnaud, Andreia Cathelin:
Artificial Intelligence: Why moving it to the Edge? ESSDERC 2021: 1-6 - [c59]Sylvain Bourdel, Serge Subias, Mohamed Khalil Bouchoucha
A gm/ID Design Methodology for 28 nm FD-SOI CMOS Resistive Feedback LNAs. ICECS 2021: 1-4 - [c58]S. M. Hossein Naghavi
A 250GHz Autodyne FMCW Radar in 55nm BiCMOS with Micrometer Range Resolution. ISSCC 2021: 320-322 - [c57]Nick Van Helleputte, Arijit Raychowdhury, Ping-Hsuan Hsieh
F3: Silicon Technologies in the Fight Against Pandemics - From Point of Care to Computational Epidemiology. ISSCC 2021: 520-524 - [c56]Edoardo Charbon, Alicia Klinefelter, Massimo Alioto, Yao-Hong Liu, Munehiko Nagatani, Arijit Raychowdhury, Andreia Cathelin, Boris Murmann:
F4: Electronics for a Quantum World. ISSCC 2021: 525-528 - [c55]Romane Dumont, Magali De Matos, Andreia Cathelin, Yann Deval:
A Low-Noise mm-Wave Injection-Locked Oscillator designed in 65nm Partially Depleted SOI CMOS Technology. NEWCAS 2021: 1-4 - [c54]Mohammadreza Dolatpoor Lakeh, Jean-Baptiste Kammerer, Jean-Baptiste Schell, Dylan Issartel, Françis Calmon
An Active Quenching Circuit for a Native 3D SPAD Pixel in a 28 nm CMOS FDSOI Technology. NEWCAS 2021: 1-4 - [c53]Fabio Disegni, A. Ventre, A. Molgora, Paolo Cappelletti, R. Badalamenti, P. Ferreira, G. Castagna, Andreia Cathelin, Anna Gandolfo, Andrea Redaelli
16MB High Density Embedded PCM macrocell for automotive-grade microcontroller in 28nm FD-SOI, featuring extension to 24MB for Over-The-Air software update. VLSI Circuits 2021: 1-2 - 2020
- [j26]Flavien Solt
Energy Efficient Heartbeat-Based MAC Protocol for WBAN Employing Body Coupled Communication. IEEE Access 8: 182966-182983 (2020) - [c52]Robin Benarrouch, Ali Moin, Flavien Solt, Antoine Frappé
Heartbeat-Based Synchronization Scheme for the Human Intranet: Modeling and Analysis. ISCAS 2020: 1-5 - [c51]David Gaidioz, Magali De Matos, Andreia Cathelin, Yann Deval:
Ring VCO Phase Noise Optimization by Pseudo-Differential Architecture in 28nm FD-SOI CMOS. ISCAS 2020: 1-4 - [c50]Ricardo Gomez Gomez, Edwige Bano, Andreia Cathelin, Sylvain Clerc:
A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOI. VLSI Circuits 2020: 1-2 - [i1]Robin Benarrouch, Ali Moin, Flavien Solt, Antoine Frappé, Andreia Cathelin, Andreas Kaiser, Jan M. Rabaey:
Heartbeat-Based Synchronization Scheme for the Human Intranet: Modeling and Analysis. CoRR abs/2005.05915 (2020)
2010 – 2019
- 2019
- [j25]Hossein Mohammadnezhad
A 115-135-GHz 8PSK Receiver Using Multi-Phase RF-Correlation-Based Direct-Demodulation Method. IEEE J. Solid State Circuits 54(9): 2435-2448 (2019) - [j24]Nikolaus Hammler
A Spectrum-Sensing DPD Feedback Receiver With 30× Reduction in ADC Acquisition Bandwidth and Sample Rate. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3340-3351 (2019) - [c49]Robin Benarrouch, Arno Thielens
Capacitive Body-Coupled Communication in the 400-500 MHz Frequency Band. BODYNETS 2019: 218-235 - [c48]Hossein Mohammadnezhad, Huan Wang, Andreia Cathelin, Payam Heydari:
A Single-Channel RF-to-Bits 36Gbps 8PSK RX with Direct Demodulation in RF Domain. CICC 2019: 1-4 - [c47]Tulio Chaves de Albuquerque, Dylan Issartel, Raphael Clerc, Patrick Pittet
Body-biasing considerations with SPAD FDSOI: advantages and drawbacks. ESSDERC 2019: 210-213 - [c46]Fabio Disegni, Roberto Annunziata, A. Molgora, G. Campardo, Paolo Cappelletti, P. Zuliani, P. Ferreira, A. Ventre, G. Castagna, Andreia Cathelin, Anna Gandolfo, F. Goller, S. Malhi, D. Manfrè, Alfonso Maurelli, C. Torti, Franck Arnaud, M. Carfì, M. Perroni, M. Caruso, S. Pezzini, G. Piazza, Olivier Weber, M. Peri:
Embedded PCM macro for automotive-grade microcontroller in 28nm FD-SOI. VLSI Circuits 2019: 204- - 2018
- [j23]Arno Thielens
A Comparative Study of On-Body Radio-Frequency Links in the 420 MHz-2.4 GHz Range. Sensors 18(12): 4165 (2018) - [j22]Babak Mohammadi
A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOI. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4): 1257-1268 (2018) - [j21]Fikre Tsigabu Gebreyohannes
All-Digital Transmitter Architecture Based on Two-Path Parallel 1-bit High Pass Filtering DACs. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3956-3969 (2018) - [c45]Andreia Cathelin:
FD-SOI Integration Solutions for Analog, RF and Millimeter-Wave Applications. ESSCIRC 2018: 215 - [c44]Tulio Chaves de Albuquerque, Françis Calmon
Integration of SPAD in 28nm FDSOI CMOS technology. ESSDERC 2018: 82-85 - [c43]Andreia Cathelin:
FD-SOI integration solutions for analog, RF and Millimeter-wave applications. ESSDERC 2018: 155 - [c42]Chen Jiang, Mohammed Aseeri, Andreia Cathelin, Ehsan Afshari:
A 301.7-to-331.8GHz source with entirely on-chip feedback loop for frequency stabilization in 0.μm BiCMOS. ISSCC 2018: 372-374 - [c41]Florent Torres
90° Hybrid coupler design technique for wideband and multimode mm-wave operations featuring lateral ground planes virtual expansion in 28nm FD-SOI CMOS technology. LASCAS 2018: 1-4 - [c40]Dipal Ghosh, Antoine Frappé
A bidirectional short range low power and high data rate W-Band transceiver for network on chip. NEWCAS 2018: 87-90 - 2017
- [j20]Hamidreza Aghasi
A 0.92-THz SiGe Power Radiator Based on a Nonlinear Theory for Harmonic Generation. IEEE J. Solid State Circuits 52(2): 406-422 (2017) - [j19]Guerric de Streel
SleepTalker: A ULV 802.15.4a IR-UWB Transmitter SoC in 28-nm FDSOI Achieving 14 pJ/b at 27 Mb/s With Channel Selection Based on Adaptive FBB and Digitally Programmable Pulse Shaping. IEEE J. Solid State Circuits 52(4): 1163-1177 (2017) - [j18]Chen Jiang
A High-Speed Efficient 220-GHz Spatial-Orthogonal ASK Transmitter in 130-nm SiGe BiCMOS. IEEE J. Solid State Circuits 52(9): 2321-2334 (2017) - [j17]Ali Mostajeran
A 170-GHz Fully Integrated Single-Chip FMCW Imaging Radar with 3-D Imaging Capability. IEEE J. Solid State Circuits 52(10): 2721-2734 (2017) - [j16]Man-Chia Chen
A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI. IEEE J. Solid State Circuits 52(11): 2843-2856 (2017) - [c39]Andreia Cathelin:
RF/analog and mixed-signal design techniques in FD-SOI technology. CICC 2017: 1-53 - [c38]Man-Chia Chen, Aldo Pena Perez, Sri-Rajasekhar Kothapalli, Philippe Cathelin, Andreia Cathelin, Sanjiv Sam Gambhir, Boris Murmann
27.5 A pixel-pitch-matched ultrasound receiver for 3D photoacoustic imaging with integrated delta-sigma beamformer in 28nm UTBB FDSOI. ISSCC 2017: 456-457 - 2016
- [j15]Masato Motomura
Introduction to the Special Issue on the 2015 Symposium on VLSI Circuits. IEEE J. Solid State Circuits 51(4): 787-788 (2016) - [j14]James Hoffman, Stefan Shopov, Pascal Chevalier
55-nm SiGe BiCMOS Distributed Amplifier Topologies for Time-Interleaved 120-Gb/s Fiber-Optic Receivers and Transmitters. IEEE J. Solid State Circuits 51(9): 2040-2053 (2016) - [j13]Stefan Shopov, Andreea Balteanu, Jürgen Hasch
A 234-261-GHz 55-nm SiGe BiCMOS Signal Source with 5.4-7.2 dBm Output Power, 1.3% DC-to-RF Efficiency, and 1-GHz Divided-Down Output. IEEE J. Solid State Circuits 51(9): 2054-2065 (2016) - [j12]Camilo Salazar, Andreia Cathelin, Andreas Kaiser
A 2.4 GHz Interferer-Resilient Wake-Up Receiver Using A Dual-IF Multi-Stage N-Path Architecture. IEEE J. Solid State Circuits 51(9): 2091-2105 (2016) - [j11]Chen Jiang
A Fully Integrated 320 GHz Coherent Imaging Transceiver in 130 nm SiGe BiCMOS. IEEE J. Solid State Circuits 51(11): 2596-2609 (2016) - [c37]M. Causo, Simone Benatti
Sampling modulation: An energy efficient novel feature extraction for biosignal processing. BioCAS 2016: 348-351 - [c36]Ilias Sourikopoulos
A digital delay line with coarse/fine tuning through gate/body biasing in 28nm FDSOI. ESSCIRC 2016: 145-148 - [c35]Babak Mohammadi, Oskar Andersson
A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless SRAM in 28 nm FD-SOI. ESSCIRC 2016: 429-432 - [c34]Laurent Malier, Andreia Cathelin, Giorgio Cesana, Laurent Le Pailleur:
Low power advanced digital technologies to enable Internet of Things. ESSDERC 2016: 15-16 - [c33]Chen Jiang, Ali Mostajeran
25.5 A 320GHz subharmonic-mixing coherent imager in 0.13µm SiGe BiCMOS. ISSCC 2016: 432-434 - [c32]Nassim Bouassida, Francois Rivet
A concurrent transmitter in CMOS 28nm FDSOI technology based on Walsh sequences generator. NEWCAS 2016: 1-4 - 2015
- [j10]Ruonan Han, Chen Jiang, Ali Mostajeran
A SiGe Terahertz Heterodyne Imaging Transmitter With 3.3 mW Radiated Power and Fully-Integrated Phase-Locked Loop. IEEE J. Solid State Circuits 50(12): 2935-2947 (2015) - [c31]Ruonan Han, Chen Jiang, Ali Mostajeran
25.5 A 320GHz phase-locked transmitter with 3.3mW radiated power and 22.5dBm EIRP for heterodyne THz imaging systems. ISSCC 2015: 1-3 - [c30]Joeri Lechevallier, Remko E. Struiksma, Hani Sherry, Andreia Cathelin, Eric A. M. Klumperink, Bram Nauta
5.5 A forward-body-bias tuned 450MHz Gm-C 3rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply. ISSCC 2015: 1-3 - [c29]Camilo Salazar, Andreas Kaiser
13.5 A -97dBm-sensitivity interferer-resilient 2.4GHz wake-up receiver using dual-IF multi-N-Path architecture in 65nm CMOS. ISSCC 2015: 1-3 - [c28]D. Danilovic, Andreia Cathelin, Andrei Vladimirescu, Borivoje Nikolic
Design considerations for low-noise transconductance amplifiers in 28nm UTBB-FDSOI. NEWCAS 2015: 1-4 - [c27]Razvan-Cristian Marin, Antoine Frappé
Considerations for high-speed configurable-bandwidth time-interleaved digital delta-sigma modulators and synthesis in 28 nm UTBB FDSOI. NEWCAS 2015: 1-4 - [c26]Pascal Urard, G. Romagnello, Andrei Banciu, J. C. Grasset, V. Heinrich, Mounir Boulemnakher, F. Todeschni, Laurent Damon, Roberto Guizzetti, L. Andre, Andreia Cathelin:
A self-powered IPv6 bidirectional wireless sensor & actuator network for indoor conditions. VLSIC 2015: 100- - 2014
- [j9]David Jacquet, Frederic Hasbani, Philippe Flatresse, Robin Wilson, Franck Arnaud, Giorgio Cesana, Thierry Di Gilio, Christophe Lecocq, Tanmoy Roy, Amit Chhabra, Chiranjeev Grover, Olivier Minez, Jacky Uginet, Guy Durieu, Cyril Adobati, Davide Casalotto, Frederic Nyer, Patrick Menut, Andreia Cathelin, Indavong Vongsavady, Philippe Magarshack:
A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization. IEEE J. Solid State Circuits 49(4): 812-826 (2014) - 2013
- [c25]Jiashu Chen, Lu Ye, Diane Titz, Fred Gianesello, Romain Pilard, Andreia Cathelin, Fabien Ferrero, Cyril Luxey, Ali M. Niknejad:
A digitally modulated mm-Wave cartesian beamforming transmitter with quadrature spatial combining. ISSCC 2013: 232-233 - 2012
- [j8]Jonathan Müller, Bruno Stefanelli, Antoine Frappé
A 7-Bit 18th Order 9.6 GS/s FIR Up-Sampling Filter for High Data Rate 60-GHz Wireless Transmitters. IEEE J. Solid State Circuits 47(7): 1743-1756 (2012) - [j7]Richard Al Hadi, Hani Sherry, Janus Grzyb, Yan Zhao, Wolfgang Forster, H. M. Keller, Andreia Cathelin, Andreas Kaiser
A 1 k-Pixel Video Camera for 0.7-1.1 Terahertz Imaging Applications in 65-nm CMOS. IEEE J. Solid State Circuits 47(12): 2999-3012 (2012) - [c24]Hani Sherry, Janus Grzyb, Yan Zhao, Richard Al Hadi, Andreia Cathelin, Andreas Kaiser
A 1kpixel CMOS camera chip for 25fps real-time terahertz imaging applications. ISSCC 2012: 252-254 - [c23]Fawzi Houfaf, Mathieu Egot, Andreas Kaiser
A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications. ISSCC 2012: 362-364 - [c22]Philippe Magarshack, Andreia Cathelin:
Gaining 10x in energy efficiency in the next decade in consumer products. VLSI-DAT 2012: 1-2 - 2011
- [j6]Alexandre Siligaris, Olivier Richard, Baudouin Martineau
A 65-nm CMOS Fully Integrated Transceiver Module for 60-GHz Wireless HD Applications. IEEE J. Solid State Circuits 46(12): 3005-3017 (2011) - [c21]Benjamin Parent, Jonathan Müller, Andreas Kaiser
Design of 10 GHz sampling rate digital FIR filters with powers-of-two coefficients. ECCTD 2011: 584-587 - [c20]Jonathan Müller, Bruno Stefanelli, Antoine Frappé
A 7-bit 18th order 9.6 GS/s FIR filter for high data rate 60-GHz wireless communications. ESSCIRC 2011: 67-70 - [c19]Ray Nguyen, Christine Raynaud, Andreia Cathelin, Boris Murmann
A 6.7-ENOB, 500-MS/s, 5.1-mW dynamic pipeline ADC in 65-nm SOI CMOS. ESSCIRC 2011: 359-362 - [c18]Mathieu Egot, Baudouin Martineau
A 20-23GHz Coupled Oscillators Array in 65nm CMOS for HDR 60GHz beamforming applications. ESSCIRC 2011: 463-466 - [c17]Alexandre Siligaris, Olivier Richard, Baudouin Martineau
A 65nm CMOS fully integrated transceiver module for 60GHz wireless HD applications. ISSCC 2011: 162-164 - [c16]Christian C. Enz, Andreia Cathelin, Maysam Ghovanloo, Stefan Heinen, Minkyu Je, David Scott:
Towards personalized medicine and monitoring for healthy living. ISSCC 2011: 516-517 - 2010
- [c15]Jonathan Müller, Andreia Cathelin, Ali M. Niknejad, Andreas Kaiser
A FIR baseband filter for high data rate 60-GHz wireless communications. ISCAS 2010: 1771-1774
2000 – 2009
- 2009
- [j5]Antoine Frappé
An All-Digital RF Signal Generator Using High-Speed ΔΣ Modulators. IEEE J. Solid State Circuits 44(10): 2722-2732 (2009) - [c14]Jean Gorisse, Andreia Cathelin, Andreas Kaiser
A 60GHz 65nm CMOS RMS power detector for antenna impedance mismatch detection. ESSCIRC 2009: 172-175 - [c13]Axel Flament, Philippe Lombard, Bruno Stefanelli, Andreas Kaiser
A combined 4-bit quadrature digital to analog converter/mixer for millimeter-wave applications. ICECS 2009: 964-967 - 2008
- [c12]Axel Flament, Antoine Frappé
A 1.2 GHz semi-digital reconfigurable FIR bandpass filter with passive power combiner. ESSCIRC 2008: 418-421 - 2007
- [j4]David Chamla, Andreas Kaiser
A Switchable-Order Gm-C Baseband Filter With Wide Digital Tuning for Configurable Radio Receivers. IEEE J. Solid State Circuits 42(7): 1513-1521 (2007) - [c11]C. Nsiala Nzeza, Jean Gorisse, Antoine Frappé
Reconfigurable digital Delta-Sigma Modulator Synthesis for digital wireless transmitters. ECCTD 2007: 480-483 - [c10]Stephane Razafimandimby, Cyrille Tilhac, Andreia Cathelin, Andreas Kaiser
Digital tuning of an analog tunable bandpass BAW-filter at GHz frequency. ESSCIRC 2007: 218-221 - [c9]Baudouin Martineau
80 GHz low noise amplifiers in 65nm CMOS SOI. ESSCIRC 2007: 348-351 - [c8]Andreia Cathelin, Baudouin Martineau
Design for millimeter-wave applications in silicon technologies. ESSCIRC 2007: 464-471 - [c7]Alexandre A. Shirakawa, Moustapha El Hassan
A Mixed Ladder-Lattice Bulk Acoustic Wave Duplexer for W-CDMA Handsets. ICECS 2007: 554-557 - [c6]S. Razafimandimby, Andreia Cathelin, Jerome Lajoinie, Andreas Kaiser
A 2GHz 0.25μm SiGe BiCMOS Oscillator with Flip-Chip Mounted BAW Resonator. ISSCC 2007: 580-623 - 2006
- [c5]Antoine Frappé
Design techniques for very high speed digital delta-sigma modulators aimed at all-digital RE transmitters. ICECS 2006: 1113-1116 - 2005
- [j3]Olivier Mazouffre, Hervé Lapuyade, Jean-Baptiste Bégueret, Andreia Cathelin, Didier Belot, Yann Deval:
A 1 V 270 My-W 2 GHz CMOS Synchronized Ring Oscillator Based Prescaler. J. Low Power Electron. 1(2): 153-160 (2005) - [j2]David Chamla, Andreas Kaiser
A Gm-C low-pass filter for zero-IF mobile applications with a very wide tuning range. IEEE J. Solid State Circuits 40(7): 1443-1450 (2005) - [c4]Moustapha El Hassan
A study on FBAR Filters reconfiguration. ICECS 2005: 1-4 - [c3]DiaaEldin Khalil, Mohamed Dessouky, Vincent Bourguet, Marie-Minerve Louërat, Andreia Cathelin, Hani F. Ragai
Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid Capacitor Arrays. ISQED 2005: 143-147 - 2004
- [c2]David Chamla, Andreas Kaiser, Andreia Cathelin, Didier Belot:
A multi-mode continuously-tunable lowpass filter for zero-IF mobile applications. ESSCIRC 2004: 95-98 - 2002
- [c1]Andreia Cathelin, Daniel Saias, Didier Belot, Youri Leclercq, François J. R. Clément:
Substrate Parasitic Extraction for RF Integrated Circuits. DATE 2002: 1107
1990 – 1999
- 1998
- [j1]Philippe Cathelin, Andreia Cathelin, Xavier Saboret, Nicolas Krasnanski, Pierre Legras, Raed V. Moughabghab, Olivier Declerck, Marc Miodini, Frank Op't Eynde:
A fully integrated CMOS PM radio receiver for wristwatch calibration. IEEE J. Solid State Circuits 33(7): 1014-1022 (1998)
Coauthor Index
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Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-30 20:29 CET by the dblp team
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