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Jun Deguchi
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2020 – today
- 2024
- [j12]Fumihiko Tachibana, Huy Cu Ngo, Go Urakawa, Takashi Toi, Mitsuyuki Ashida, Yuta Tsubouchi, Mai Nozawa, Junji Wadatsumi, Hiroyuki Kobayashi, Jun Deguchi:
A Mueller-Müller CDR with False-Lock-Aware Locking Scheme for a 56-Gb/s ADC-Based PAM4 Transceiver. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 107(5): 709-718 (2024) - [c23]Shinichi Sasaki, Yuta Aiba, Yusuke Komano, Takahiko Iizuka, Motohiko Fujimatsu, Atsushi Kawasumi, Daisuke Miyashita, Jun Deguchi, Takashi Maeda, Shinji Miyano, Tooru Maruyama:
Mitigation of Accuracy Degradation in 3D Flash Memory Based Approximate Nearest Neighbor Search with Binary Tree Balanced Soft Clustering for Retrieval-Augmented AI. NewCAS 2024: 238-242 - [i6]Kento Tatsuno, Daisuke Miyashita, Taiga Ikeda, Kiyoshi Ishiyama, Kazunari Sumiyoshi, Jun Deguchi:
AiSAQ: All-in-Storage ANNS with Product Quantization for DRAM-free Information Retrieval. CoRR abs/2404.06004 (2024) - [i5]Kengo Nakata, Daisuke Miyashita, Youyang Ng, Yasuto Hoshi, Jun Deguchi:
Rethinking Sparse Lexical Representations for Image Retrieval in the Age of Rising Multi-Modal Large Language Models. CoRR abs/2408.16296 (2024) - 2023
- [c22]Yasuto Hoshi, Daisuke Miyashita, Youyang Ng
, Kento Tatsuno, Yasuhiro Morioka, Osamu Torii, Jun Deguchi:
RaLLe: A Framework for Developing and Evaluating Retrieval-Augmented Large Language Models. EMNLP (Demos) 2023: 52-69 - [i4]Yasuto Hoshi, Daisuke Miyashita, Yasuhiro Morioka, Youyang Ng
Can a Frozen Pretrained Language Model be used for Zero-shot Neural Retrieval on Entity-centric Questions? CoRR abs/2303.05153 (2023) - [i3]Youyang Ng
SimplyRetrieve: A Private and Lightweight Retrieval-Centric Generative AI Tool. CoRR abs/2308.03983 (2023) - [i2]Yasuto Hoshi, Daisuke Miyashita, Youyang Ng
RaLLe: A Framework for Developing and Evaluating Retrieval-Augmented Large Language Models. CoRR abs/2308.10633 (2023) - 2022
- [j11]Amir Amirkhany
Introduction to the Special Section on the 2021 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits 57(1): 3-5 (2022) - [j10]Takashi Toi
A 25.6-Gb/s Interface Employing PAM-4-Based Four-Channel Multiplexing and Cascaded Clock and Data Recovery Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems. IEEE J. Solid State Circuits 57(5): 1517-1526 (2022) - [c21]Kengo Nakata, Youyang Ng
Revisiting a kNN-Based Image Classification System with High-Capacity Storage. ECCV (37) 2022: 457-474 - [c20]Fumihiko Tachibana, Huy Cu Ngo, Go Urakawa, Takashi Toi, Mitsuyuki Ashida, Yuta Tsubouchi, Mai Nozawa, Junji Wadatsumi, Hiroyuki Kobayashi, Jun Deguchi:
A 56-Gb/s PAM4 Transceiver with False-Lock-Aware Locking Scheme for Mueller-Müller CDR. ESSCIRC 2022: 505-508 - [i1]Kengo Nakata, Youyang Ng
Revisiting a kNN-based Image Classification System with High-capacity Storage. CoRR abs/2204.01186 (2022) - 2021
- [j9]Go Urakawa, Hiroyuki Kobayashi, Jun Deguchi, Ryuichi Fujimoto:
A Noise-Canceling Charge Pump for Area Efficient PLL Design. IEICE Trans. Electron. 104-C(10): 625-634 (2021) - [j8]Friedel Gerfers
Introduction to the Special Issue on the 2020 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits 56(1): 3-6 (2021) - [j7]Robert Chen-Hao Chang
Introduction to the Special Section on the 2020 Asian Solid-State Circuits Conference (A-SSCC). IEEE J. Solid State Circuits 56(10): 2900-2901 (2021) - [c19]Kengo Nakata, Daisuke Miyashita, Asuka Maki, Fumihiko Tachibana, Shinichi Sasaki, Jun Deguchi, Ryuichi Fujimoto:
Quantization Strategy for Pareto-optimally Low-cost and Accurate CNN. AICAS 2021: 1-4 - [c18]Kengo Nakata, Daisuke Miyashita, Jun Deguchi, Ryuichi Fujimoto:
Adaptive Quantization Method for CNN with Computational-Complexity-Aware Regularization. ISCAS 2021: 1-5 - [c17]Jun Deguchi, Yongpan Liu, Yan Li:
Session 15 Overview: Compute-in-Memory Processors for Deep Neural Networks Machine Learning Subcommittee. ISSCC 2021: 234-235 - [c16]Nick Van Helleputte, Arijit Raychowdhury, Ping-Hsuan Hsieh
F3: Silicon Technologies in the Fight Against Pandemics - From Point of Care to Computational Epidemiology. ISSCC 2021: 520-524 - 2020
- [j6]Asuka Maki, Daisuke Miyashita, Shinichi Sasaki, Kengo Nakata, Fumihiko Tachibana, Tomoya Suzuki, Jun Deguchi, Ryuichi Fujimoto:
Weight Compression MAC Accelerator for Effective Inference of Deep Learning. IEICE Trans. Electron. 103-C(10): 514-523 (2020)
2010 – 2019
- 2019
- [j5]Yuta Tsubouchi
A 12.8-Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth, Large-Capacity Storage Systems. IEEE J. Solid State Circuits 54(4): 1086-1095 (2019) - [c15]Shinichi Sasaki, Asuka Maki, Daisuke Miyashita, Jun Deguchi:
Post Training Weight Compression with Distribution-based Filter-wise Quantization Step. COOL CHIPS 2019: 1-3 - [c14]Kengo Nakata, Asuka Maki, Daisuke Miyashita, Fumihiko Tachibana, Tomoya Suzuki, Jun Deguchi:
Live Demonstration: FPGA-Based CNN Accelerator with Filter-Wise-Optimized Bit Precision. ISCAS 2019: 1 - [c13]Takashi Toi, Junji Wadatsumi, Hiroyuki Kobayashi, Yutaka Shimizu, Yuji Satoh, Makoto Morimoto, Rui Ito, Mitsuyuki Ashida, Yuta Tsubouchi, Mai Nozawa, Go Urakawa, Jun Deguchi:
A 25.6Gb/s Uplink-Downlink Interface Employing PAM-4-Based 4-Channel Multiplexing and Cascaded CDR Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems. ISSCC 2019: 478-480 - 2018
- [c12]Asuka Maki, Daisuke Miyashita, Kengo Nakata, Fumihiko Tachibana, Tomoya Suzuki, Jun Deguchi:
FPGA-based CNN Processor with Filter-Wise-Optimized Bit Precision. A-SSCC 2018: 47-50 - [c11]Vivek De, Dennis Sylvester, James Myers, Jun Deguchi, Shinichiro Shiratake, Ingrid Verbauwhede
F1: Intelligent energy-efficient systems at the edge of IoT. ISSCC 2018: 502-504 - [c10]Yuta Tsubouchi, Daisuke Miyashita, Yuji Satoh, Takashi Toi, Fumihiko Tachibana, Makoto Morimoto, Junji Wadatsumi, Jun Deguchi:
A 12.8 GB/S Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth and Large-Capacity Storage Systems. VLSI Circuits 2018: 149-150 - 2017
- [j4]Daisuke Miyashita
A Neuromorphic Chip Optimized for Deep Learning and CMOS Technology With Time-Domain Analog and Digital Mixed-Signal Processing. IEEE J. Solid State Circuits 52(10): 2679-2689 (2017) - [c9]Hayato Wakabayashi, Jun Deguchi, Makoto Ikeda:
Session 4 overview: Imagers. ISSCC 2017: 64-65 - [c8]Meng-Fan Chang, Jun Deguchi, Vivek De, Masato Motomura, Shinichiro Shiratake, Marian Verhelst:
F3: Beyond the horizon of conventional computing: From deep learning to neuromorphic systems. ISSCC 2017: 506-508 - 2016
- [c7]Daisuke Miyashita, Shouhei Kousai, Tomoya Suzuki, Jun Deguchi:
Time-domain neural network: A 48.5 TSOp/s/W neuromorphic chip optimized for deep learning and CMOS technology. A-SSCC 2016: 25-28 - [c6]Jun Deguchi, David Stoppa:
Session 6 overview: Image sensors. ISSCC 2016: 108-109 - 2014
- [c5]Jun Deguchi, Toshiyuki Yamagishi, Hideaki Majima, Nau Ozaki, Kazuhiro Hiwada, Makoto Morimoto, Tatsuji Ashitani, Shouhei Kousai:
A 1.4Mpixel CMOS image sensor with multiple row-rescan based data sampling for optical camera communication. A-SSCC 2014: 17-20 - 2013
- [c4]Jun Deguchi, Fumihiko Tachibana, Makoto Morimoto, Masayoshi Chiba, Takeshi Miyaba, Hideki Tanaka, Kyoichi Takenaka, Satoshi Funayama, Kunihiko Amano, Kazuhide Sugiura, Ryuta Okamoto, Shouhei Kousai:
A 187.5µVrms-read-noise 51mW 1.4Mpixel CMOS image sensor with PMOSCAP column CDS and 10b self-differential offset-cancelled pipeline SAR-ADC. ISSCC 2013: 494-495 - 2012
- [j3]Daisuke Miyashita, Hiroyuki Kobayashi, Jun Deguchi, Shouhei Kousai, Mototsugu Hamada, Ryuichi Fujimoto:
A-104 dBc/Hz In-Band Phase Noise 3 GHz All Digital PLL with Phase Interpolation Based Hierarchical Time to Digital Converter. IEICE Trans. Electron. 95-C(6): 1008-1016 (2012) - 2010
- [j2]Jun Deguchi, Daisuke Miyashita, Yosuke Ogasawara, Gaku Takemura, Masaomi Iwanaga, Kenichi Sami, Rui Ito, Junji Wadatsumi, Yuki Tsuda, Shoko Oda, Shunji Kawaguchi, Nobuyuki Itoh, Mototsugu Hamada:
A Fully Integrated 2 ˟ 1 Dual-Band Direct-Conversion Mobile WiMAX Transceiver With Dual-Mode Fractional Divider and Noise-Shaping Transimpedance Amplifier in 65 nm CMOS. IEEE J. Solid State Circuits 45(12): 2774-2784 (2010) - [c3]Jun Deguchi, Daisuke Miyashita, Yosuke Ogasawara, Gaku Takemura, Masaomi Iwanaga, Kenichi Sami, Rui Ito, Junji Wadatsumi, Yuki Tsuda, Shoko Oda, Shunji Kawaguchi, Nobuyuki Itoh, Mototsugu Hamada:
A fully integrated 2×1 dual-band direct-conversion transceiver with dual-mode fractional divider and noise-shaping TIA for mobile WiMAX SoC in 65nm CMOS. ISSCC 2010: 456-457
2000 – 2009
- 2009
- [c2]Jun Deguchi, Daisuke Miyashita, Mototsugu Hamada:
A 0.6V 380µW -14dBm LO-input 2.4GHz double-balanced current-reusing single-gate CMOS mixer with cyclic passive combiner. ISSCC 2009: 224-225 - 2006
- [j1]Kentaro Kotani, Shigeaki Esaka, Makoto Yamada, Jun Deguchi, Ken Horii, Mitsuo Tonoike, Taro Noguchi:
Measurement of neuromagnetic fields accompanying movements by patient with acute stroke. Syst. Comput. Jpn. 37(7): 12-25 (2006) - [c1]Atsushi Konno, Ryo Uchikura, Toshiyuki Ishihara, Teppei Tsujita, Takeaki Sugimura, Jun Deguchi, Mitsumasa Koyanagi, Masaru Uchiyama:
Development of a High Speed Vision System for Mobile Robots. IROS 2006: 1372-1377
Coauthor Index
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