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Zhenyu Qi 0001
Person information
- affiliation: University of Virginia, Charlottesville, VA, USA
Other persons with the same name
- Zhenyu Qi
- Zhenyu Qi 0002 — University of California Riverside, Riverside, CA, USA
- Zhenyu Qi 0003 — Institute of Automation, Chinese Academy of Sciences (CAS), China
- Zhenyu Qi 0004 — Sun Yat-sen University Cancer Center, Guangzhou, China
- Zhenyu Qi 0005
— University of Arizona, Tucson, AZ, USA
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2010 – 2019
- 2012
- [j1]Stuart N. Wooters, Adam C. Cabe, Zhenyu Qi, Jiajing Wang, Randy W. Mann, Benton H. Calhoun, Mircea R. Stan
Tracking On-Chip Age Using Distributed, Embedded Sensors. IEEE Trans. Very Large Scale Integr. Syst. 20(11): 1974-1985 (2012) - 2010
- [c11]Jiajing Wang, Satyanand Nalam, Zhenyu Qi, Randy W. Mann, Mircea R. Stan
Improving SRAM Vmin and yield by using variation-aware BTI stress. CICC 2010: 1-4 - [c10]Adam C. Cabe, Zhenyu Qi, Mircea R. Stan
Stacking SRAM banks for ultra low power standby mode operation. DAC 2010: 699-704 - [c9]Zhenyu Qi, Jiajing Wang, Adam C. Cabe, Stuart N. Wooters, Travis N. Blalock, Benton H. Calhoun, Mircea R. Stan
SRAM-based NBTI/PBTI sensor system design. DAC 2010: 849-852 - [c8]Zhenyu Qi, Brett H. Meyer, Wei Huang, Robert J. Ribando, Kevin Skadron
Temperature-to-power mapping. ICCD 2010: 384-389
2000 – 2009
- 2009
- [c7]Adam C. Cabe, Zhenyu Qi, Stuart N. Wooters, Travis N. Blalock, Mircea R. Stan
Small embeddable NBTI sensors (SENS) for tracking on-chip performance decay. ISQED 2009: 1-6 - 2008
- [c6]Zhenyu Qi, Mircea R. Stan
NBTI resilient circuits using adaptive body biasing. ACM Great Lakes Symposium on VLSI 2008: 285-290 - 2007
- [c5]Matthew M. Ziegler, Gary S. Ditlow, Stephen V. Kosonocky, Zhenyu Qi, Mircea R. Stan
Structured and tuned array generation (STAG) for high-performance random logic. ACM Great Lakes Symposium on VLSI 2007: 257-262 - [c4]Zhenyu Qi, Matthew M. Ziegler, Stephen V. Kosonocky, Jan M. Rabaey, Mircea R. Stan
Multi-Dimensional Circuit and Micro-Architecture Level Optimization. ISQED 2007: 275-280 - [c3]Zhenyu Qi, Mircea R. Stan
Accurate Back-of-the-Envelope Transistor Model for Deep Sub-micron MOS. MSE 2007: 75-76 - [c2]Mircea R. Stan
Teaching Top-Down ASIC/SoC Design vs Bottom-Up Custom VLSI. MSE 2007: 89-90 - 2006
- [c1]Zhenyu Qi, Wei Huang, Adam C. Cabe, Wenqian Wu, Yan Zhang, Garrett S. Rose, Mircea R. Stan
A Design Methodology for a Low-Power, Temperature-Aware SoC Developed for Medical Image Processors. SoCC 2006: 111-112
Coauthor Index
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