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Masato Edahiro
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2020 – today
- 2024
- [j36]Shanwen Wu
, Satoshi Kumano, Kei Marume
Task Mapping and Scheduling on RISC-V MIMD Processor With Vector Accelerator Using Model-Based Parallelization. IEEE Access 12: 35779-35795 (2024) - [c39]Qi Li, Masato Edahiro:
Template-Based Automatic Library Function Generation with Halide for Compute-Intensive Simulink Models. COOL CHIPS 2024: 1-6 - 2023
- [j35]Anh Nguyen, Abraham Monrroy Cano
GPU-Accelerated 3D Normal Distributions Transform. J. Robotics Mechatronics 35(2): 445-459 (2023) - 2022
- [j34]Yutaro Kobayashi, Kentaro Honda, Sasuga Kojima, Hiroshi Fujimoto, Masato Edahiro, Takuya Azumi:
Mapping Method Usable with Clustered Many-core Platforms for Simulink Model. J. Inf. Process. 30: 141-150 (2022) - [j33]Abraham Monrroy Cano
Single-Shot Intrinsic Calibration for Autonomous Driving Applications. Sensors 22(5): 2067 (2022) - 2021
- [j32]Manato Hirabayashi, Yukihiro Saito, Kosuke Murakami, Akihito Ohsato, Shinpei Kato, Masato Edahiro:
Vision-Based Sensing Systems for Autonomous Driving: Centralized or Decentralized? J. Robotics Mechatronics 33(3): 686-697 (2021) - 2020
- [j31]Patricia Ortal
Similarity Measure for Product Attribute Estimation. IEEE Access 8: 179073-179082 (2020) - [j30]Patricia Ortal
Switching Hybrid Method Based on User Similarity and Global Statistics for Collaborative Filtering. IEEE Access 8: 213401-213415 (2020) - [j29]Abraham Monrroy Cano
An Open Multi-Sensor Fusion Toolbox for Autonomous Vehicles. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 103-A(1): 252-264 (2020) - [j28]Anh Nguyen, Abraham Monrroy Cano
Fast Euclidean Cluster Extraction Using GPUs. J. Robotics Mechatronics 32(3): 548-560 (2020) - [c38]Kentaro Honda, Sasuga Kojima, Hiroshi Fujimoto, Masato Edahiro, Takuya Azumi:
Mapping Method of MATLAB/Simulink Model for Embedded Many-Core Platform. PDP 2020: 182-186
2010 – 2019
- 2019
- [j27]Ye Liu
Optimization of the Load Balancing Policy for Tiled Many-Core Processors. IEEE Access 7: 10176-10188 (2019) - [j26]Ye Liu
Analysis of Memory System of Tiled Many-Core Processors. IEEE Access 7: 18964-18977 (2019) - [j25]Manato Hirabayashi, Adi Sujiwo, Abraham Monrroy, Shinpei Kato, Masato Edahiro:
Traffic light recognition using high-definition map features. Robotics Auton. Syst. 111: 62-72 (2019) - [c37]Zhaoqian Zhong, Masato Edahiro:
Model-based Parallelization for Simulink Models on Multicore CPUs and GPUs. ISOCC 2019: 103-104 - 2018
- [c36]Ye Liu, Shinpei Kato, Masato Edahiro:
Is the Heap Manager Important to Many Cores? ROSS@HPDC 2018: 5:1-5:6 - [c35]Anh Nguyen, Masato Edahiro, Shinpei Kato:
GPU-Accelerated VoltDB: A Case for Indexed Nested Loop Join. HPCS 2018: 204-212 - [c34]Zhaoqian Zhong, Masato Edahiro:
Model-Based Parallelizer for Embedded Control Systems on Single-ISA Heterogeneous Multicore Processors. ISOCC 2018: 117-118 - 2017
- [j24]Adi Sujiwo, Eijiro Takeuchi, Luis Yoichi Morales Saiki, Naoki Akai, Hatem Darweesh, Yoshiki Ninomiya, Masato Edahiro:
Robust and Accurate Monocular Vision-Based Localization in Outdoor Environments of Real-World Robot Challenge. J. Robotics Mechatronics 29(4): 685-696 (2017) - [j23]Makoto Yabuta, Anh Nguyen, Shinpei Kato, Masato Edahiro, Hideyuki Kawashima:
Relational Joins on GPUs: A Closer Look. IEEE Trans. Parallel Distributed Syst. 28(9): 2663-2673 (2017) - [c33]Adi Sujiwo, Eijiro Takeuchi, Luis Yoichi Morales Saiki, Naoki Akai, Yoshiki Ninomiya, Masato Edahiro:
Localization based on multiple visual-metric maps. MFI 2017: 212-219 - 2016
- [j22]Yuta Suzuki, Kota Sata, Junichi Kako, Kohei Yamaguchi, Fumio Arakawa, Masato Edahiro:
Parallel Design of Feedback Control Systems Utilizing Dead Time for Embedded Multicore Processors. IEICE Trans. Electron. 99-C(4): 491-502 (2016) - [j21]Adi Sujiwo, Tomohito Ando, Eijiro Takeuchi, Yoshiki Ninomiya, Masato Edahiro:
Monocular Vision-Based Localization Using ORB-SLAM with LIDAR-Aided Mapping in Real-World Robot Challenge. J. Robotics Mechatronics 28(4): 479-490 (2016) - [j20]Manato Hirabayashi, Shinpei Kato, Masato Edahiro, Kazuya Takeda, Seiichi Mita:
Accelerated Deformable Part Models on GPUs. IEEE Trans. Parallel Distributed Syst. 27(6): 1589-1602 (2016) - [c32]Hiroki Ohta, Naoki Akai, Eijiro Takeuchi, Shinpei Kato, Masato Edahiro:
Pure Pursuit Revisited: Field Testing of Autonomous Vehicles in Urban Areas. CPSNA 2016: 7-12 - [c31]Ye Liu, Hiroshi Sasaki, Shinpei Kato, Masato Edahiro:
A Scalability Analysis of Many Cores and On-Chip Mesh Networks on the TILE-Gx Platform. MCSoC 2016: 46-52 - 2015
- [j19]Yuki Ando, Yukihito Ishida, Shinya Honda, Hiroaki Takada, Masato Edahiro:
Automatic Synthesis of Inter-heterogeneous-processor Communication for Programmable System-on-chip. Inf. Media Technol. 10(3): 415-419 (2015) - [j18]Yuki Ando, Yukihito Ishida, Shinya Honda, Hiroaki Takada, Masato Edahiro:
Automatic Synthesis of Inter-heterogeneous-processor Communication for Programmable System-on-chip. IPSJ Trans. Syst. LSI Des. Methodol. 8: 95-99 (2015) - [j17]Masato Edahiro:
Editor's Message to Special Issue on Embedded Systems Engineering. J. Inf. Process. 23(2): 117 (2015) - [j16]Masato Edahiro:
Editor's Message to Special Issue of Embedded Systems Engineering. J. Inf. Process. 23(5): 531 (2015) - [j15]Yuki Ando, Shinya Honda, Hiroaki Takada, Masato Edahiro:
System-level Design Method for Control Systems with Hardware-implemented Interrupt Handler. J. Inf. Process. 23(5): 532-541 (2015) - [c30]Abraham Monrroy, Manato Hirabayashi, Shinpei Kato, Masato Edahiro, Takefumi Miyoshi, Satoshi Funada:
Hexa Cam: An FPGA-Based Multi-view Camera System. CPSNA 2015: 48-53 - [c29]Patricia Ortal, Shinpei Kato, Masato Edahiro:
Real-Time Visualization of Moving Objects. CPSNA 2015: 60-65 - 2014
- [c28]Masaki Kondo, Fumio Arakawa, Masato Edahiro:
Establishing a standard interface between multi-manycore and software tools - SHIM. COOL Chips 2014: 1-3 - [c27]Yuta Suzuki, Kota Sata, Junichi Kako, Kohei Yamaguchi, Fumio Arakawa, Masato Edahiro:
Parallel design of control systems utilizing dead time for embedded multicore processors. COOL Chips 2014: 1-3 - [c26]Riku Nakamura, Fumio Arakawa, Masato Edahiro:
Simple One-to-One Architecture for Parallel Execution of Embedded Control Systems. CPSNA 2014: 25-30 - [c25]Yuki Abe, Hiroshi Sasaki, Shinpei Kato, Koji Inoue, Masato Edahiro, Martin Peres:
Power and Performance Characterization and Modeling of GPU-Accelerated Systems. IPDPS 2014: 113-122 - [c24]Yuki Kitsukawa, Manato Hirabayashi, Shinpei Kato, Masato Edahiro:
Exploring the problem of GPU programming for data-intensive applications: a case study of multiple expectation maximization for motif elicitation. SoICT 2014: 256-262 - 2013
- [j14]Krzysztof Jozwik
Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs. Int. J. Reconfigurable Comput. 2013: 789134:1-789134:40 (2013) - [c23]Manato Hirabayashi, Shinpei Kato, Masato Edahiro, Kazuya Takeda, Taiki Kawano, Seiichi Mita:
GPU implementations of object detection using HOG features and deformable models. CPSNA 2013: 106-111 - [c22]Yusuke Fujii, Takuya Azumi, Nobuhiko Nishio, Shinpei Kato, Masato Edahiro:
Data Transfer Matters for GPU Computing. ICPADS 2013: 275-282 - [c21]Yuki Abe, Hiroshi Sasaki, Shinpei Kato, Koji Inoue, Masato Edahiro, Martin Peres:
Power and performance of GPU-accelerated systems: A closer look. IISWC 2013: 109-110 - 2012
- [j13]Krzysztof Jozwik
Comparison of Preemption Schemes for Partially Reconfigurable FPGAs. IEEE Embed. Syst. Lett. 4(2): 45-48 (2012) - [j12]Hirotaka Kawashima, Gang Zeng, Hideki Takase
Efficient Algorithms for Extracting Pareto-optimal Hardware Configurations in DEPS Framework. IPSJ Trans. Syst. LSI Des. Methodol. 5: 133-142 (2012) - [c20]Vorapong Suppakitpaisarn, Masato Edahiro, Hiroshi Imai:
Fast Elliptic Curve Cryptography Using Minimal Weight Conversion of d Integers. AISC 2012: 15-26 - [c19]Manato Hirabayashi, Shinpei Kato, Masato Edahiro, Yuki Sugiyama:
Toward GPU-accelerated traffic simulation and its real-time challenge. REACTION 2012 - [c18]Vorapong Suppakitpaisarn
Calculating Average Joint Hamming Weight for Minimal Weight Conversion of d Integers. WALCOM 2012: 229-240 - [c17]Vorapong Suppakitpaisarn, Hiroshi Imai, Masato Edahiro:
Fastest multi-scalar multiplication based on optimal double-base chains. WorldCIS 2012: 93-98 - 2011
- [c16]Krzysztof Jozwik, Hiroyuki Tomiyama, Masato Edahiro, Shinya Honda, Hiroaki Takada:
Hardware multitasking in dynamically partially reconfigurable FPGA-based embedded systems. ISOCC 2011: 183-186 - [c15]Hiroki Mikami, Shumpei Kitaki, Masayoshi Mase, Akihiro Hayashi, Mamoru Shimaoka, Keiji Kimura, Masato Edahiro, Hironori Kasahara
Evaluation of Power Consumption at Execution of Multiple Automatically Parallelized and Power Controlled Media Applications on the RP2 Low-Power Multicore. LCPC 2011: 31-45 - [c14]Krzysztof Jozwik
Rainbow: An OS Extension for Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs. ReConFig 2011: 416-421 - [i2]Vorapong Suppakitpaisarn, Masato Edahiro, Hiroshi Imai:
Fast Elliptic Curve Cryptography Using Optimal Double-Base Chains. IACR Cryptol. ePrint Arch. 2011: 30 (2011) - 2010
- [j11]Hiroaki Inoue, Junji Sakai, Masato Edahiro:
A robust seamless communication architecture for next-generation mobile terminals on multi-CPU SoCs. ACM Trans. Embed. Comput. Syst. 9(3): 19:1-19:28 (2010) - [i1]Vorapong Suppakitpaisarn, Masato Edahiro, Hiroshi Imai:
Optimal Average Joint Hamming Weight and Minimal Weight Conversion of d Integers. IACR Cryptol. ePrint Arch. 2010: 300 (2010)
2000 – 2009
- 2009
- [j10]Hiroaki Inoue, Tsuyoshi Abe, Kazuhisa Ishizaka, Junji Sakai, Masato Edahiro:
Dynamic security domain scaling on embedded symmetric multiprocessors. ACM Trans. Design Autom. Electr. Syst. 14(2): 24:1-24:23 (2009) - [c13]Masato Edahiro:
Parallelizing fundamental algorithms such as sorting on multi-core processors for EDA acceleration. ASP-DAC 2009: 230-233 - 2008
- [j9]Junji Sakai, Hiroaki Inoue, Sunao Torii, Masato Edahiro:
Multitasking Parallel Method for High-End Embedded Appliances. IEEE Micro 28(5): 54-62 (2008) - [j8]Hiroaki Inoue, Junji Sakai, Sunao Torii, Masato Edahiro:
FIDES: An advanced chip multiprocessor platform for secure next generation mobile terminals. ACM Trans. Embed. Comput. Syst. 8(1): 1:1-1:16 (2008) - [j7]Hiroaki Inoue, Junji Sakai, Masato Edahiro:
Processor virtualization for secure mobile terminals. ACM Trans. Design Autom. Electr. Syst. 13(3): 48:1-48:23 (2008) - 2007
- [c12]Hiroaki Inoue, Masato Edahiro, Junji Sakai:
Towards scalable and secure execution platform for embedded systems. ASP-DAC 2007: 350-354 - [c11]Hiroaki Inoue, Akihisa Ikeno, Tsuyoshi Abe, Junji Sakai, Masato Edahiro:
Dynamic security domain scaling on symmetric multiprocessors for future high-end embedded systems. CODES+ISSS 2007: 39-44 - 2006
- [c10]Hiroaki Inoue, Akihisa Ikeno, Masaki Kondo, Junji Sakai, Masato Edahiro:
VIRTUS: a new processor virtualization architecture for security-oriented next-generation mobile terminals. DAC 2006: 484-489 - 2005
- [c9]Hiroaki Inoue, Akihisa Ikeno, Masaki Kondo, Junji Sakai, Masato Edahiro:
FIDES: an advanced chip multiprocessor platform for secure next generation mobile terminals. CODES+ISSS 2005: 178-183 - 2000
- [j6]Masato Edahiro, Satoshi Matsushita, Masakazu Yamashina, Naoki Nishi:
A Single-Chip Multiprocessor for Smart Terminals. IEEE Micro 20(4): 12-20 (2000)
1990 – 1999
- 1998
- [c8]Shuji Takahashi, Masato Edahiro, Yoshihiro Hayashi
A New LSI Performance Prediction Model for Interconnection Analysis of Future LSIs. ASP-DAC 1998: 51-56 - [c7]Susumu Kobayashi, Masato Edahiro, Mikio Kubo:
Scan-chain Optimization Algorithms for Multiple Scan-paths. ASP-DAC 1998: 301-306 - 1996
- [j5]Masato Edahiro:
Equispreading Tree in Manhattan Distance. Algorithmica 16(3): 316-338 (1996) - [c6]Masato Edahiro, Richard J. Lipton:
Clock Buffer Placement Algorithm for Wire-Delay-Dominated Timing Model. Great Lakes Symposium on VLSI 1996: 143-147 - 1994
- [c5]Masato Edahiro:
An Efficient Zero-Skew Routing Algorithm. DAC 1994: 375-380 - 1993
- [j4]Takashi Miyazaki, Takao Nishitani, Masato Edahiro, Ikuko Ono, Kaoru Mitsuhashi:
DCT/IDCT processor for HDTV developed with dsp silicon compiler. J. VLSI Signal Process. 5(2-3): 151-158 (1993) - [c4]Masato Edahiro:
A Clustering-Based Optimization Algorithm in Zero-Skew Routings. DAC 1993: 612-616 - 1992
- [j3]Takashi Miyazaki, Takao Nishitani, Masaki Ishikawa, Masato Edahiro, Kaoru Mitsuhashi:
Chrominance/luminance signal separation and syntheses chips developed with a DSP silicon compiler. IEEE Trans. Circuits Syst. Video Technol. 2(2): 245-254 (1992) - 1990
- [c3]Masato Edahiro, Takeshi Yoshimura:
New Placement and Global Routing Algorithms for Standard Cell Layouts. DAC 1990: 642-645 - [c2]Masato Edahiro:
A Clock Net Reassignment Algorithm Usign Voronoi Diagram. ICCAD 1990: 420-423
1980 – 1989
- 1989
- [j2]Masato Edahiro, Katsuhiko Tanaka, Takashi Hoshino, Takao Asano:
A Bucketing Algorithm for the Orthogonal Segment Intersection Search Problem and Its Practical Efficiency. Algorithmica 4(1): 61-76 (1989) - 1987
- [c1]Masato Edahiro, Katsuhiko Tanaka, Takashi Hoshino, Takao Asano:
A Bucketing Algorithm for the Orthogonal Segment Intersection Search Problem and Its Practical Efficiency. SCG 1987: 258-267 - 1984
- [j1]Masato Edahiro, I. Kokubo, Takao Asano:
A New Point-Location Algorithm and Its Practical Efficiency: Comparison with Existing Algorithms. ACM Trans. Graph. 3(2): 86-109 (1984)
Coauthor Index
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last updated on 2024-08-27 21:57 CEST by the dblp team
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