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Chun-Yu Lin 0001
Person information
- affiliation: National Taiwan Normal University, Department of Electrical Engineering, Taiwan
- affiliation (PhD 2009): National Chiao Tung University, Institute of Electronics, Hsinchu, Taiwan
Other persons with the same name
- Chun-Yu Lin — disambiguation page
- Chun-Yu Lin 0002 — National Taiwan University, Department of Electrical Engineering, Graduate Institute of Engineering, Taipei, Taiwan (and 1 more)
- Chun-Yu Lin 0003 — Kyoto University, Bioinformatics Center, Institute for Chemical Research (and 1 more)
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2010 – 2019
- 2018
- [j12]Guo-Lun Huang, Wei-Hao Fu, Chun-Yu Lin:
Investigation and application of vertical NPN devices for RF ESD protection in BiCMOS technology. Microelectron. Reliab. 83: 271-280 (2018) - [j11]Bo-Wei Peng, Chun-Yu Lin:
Low-Loss I/O Pad With ESD Protection for K/Ka-Bands Applications in the Nanoscale CMOS Process. IEEE Trans. Circuits Syst. II Express Briefs 65-II(10): 1475-1479 (2018) - 2017
- [j10]Chun-Yu Lin, Meng-Ting Lin:
Improved stacked-diode ESD protection in nanoscale CMOS technology. IEICE Electron. Express 14(13): 20170570 (2017) - [j9]Chun-Yu Lin, Rui-Hong Liu, Ming-Dou Ker:
Design of 2.4-GHz T/R switch with embedded ESD protection devices in CMOS process. Microelectron. Reliab. 78: 258-266 (2017) - 2016
- [j8]Chun-Yu Lin, Yu-Kai Chiu, Shuan-Yu Yueh:
Design of local ESD clamp for cross-power-domain interface circuits. IEICE Electron. Express 13(20): 20160806 (2016) - [c16]Guan-Yi Li, Chun-Yu Lin:
On-chip ESD protection design for radio-frequency power amplifier with large-swing-tolerance consideration. APCCAS 2016: 258-261 - [c15]Chun-Yu Lin, Rong-Kun Chang:
ESD protection design for high-speed circuits in nanoscale CMOS process. ISIC 2016: 1-4 - [c14]Jie-Ting Chen, Chun-Yu Lin, Rong-Kun Chang, Ming-Dou Ker, Tzu-Chien Tzeng, Tzu-Chiang Lin:
ESD protection design for high-speed applications in CMOS technology. MWSCAS 2016: 1-4 - 2015
- [j7]Chun-Yu Lin, Yan-Lian Chiu:
Investigation on SCR-based ESD protection device for biomedical integrated circuits in a 0.18-μm CMOS process. Microelectron. Reliab. 55(11): 2229-2235 (2015) - 2014
- [j6]Wei-Ming Chen, Herming Chiueh, Tsan-Jieh Chen, Chia-Lun Ho, Chi Jeng, Ming-Dou Ker, Chun-Yu Lin, Ya-Chun Huang, Chia-Wei Chou, Tsun-Yuan Fan, Ming-Seng Cheng, Yue-Loong Hsin, Sheng-Fu Liang, Yu-Lin Wang, Fu-Zen Shaw, Yu-Hsing Huang, Chia-Hsiang Yang, Chung-Yu Wu:
A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic CMOS SoC for Real-Time Epileptic Seizure Control. IEEE J. Solid State Circuits 49(1): 232-247 (2014) - [c13]Chun-Yu Lin, Rong-Kun Chang:
On-chip ESD protection designs with SCR-based devices in RF integrated circuits. ICCE-TW 2014: 15-16 - [c12]Kuan-Yu Lin, Ming-Dou Ker, Chun-Yu Lin:
A high-voltage-tolerant stimulator realized in the low-voltage CMOS process for cochlear implant. ISCAS 2014: 237-240 - [c11]Li-Wei Chu, Chun-Yu Lin, Ming-Dou Ker, Ming-Hsiang Song, Jeng-Chou Tseng, Chewnpu Jou, Ming-Hsien Tsai:
ESD protection design for wideband RF applications in 65-nm CMOS process. ISCAS 2014: 1480-1483 - 2013
- [j5]Chun-Yu Lin, Wei-Ling Chen, Ming-Dou Ker:
Implantable Stimulator for Epileptic Seizure Suppression With Loading Impedance Adaptability. IEEE Trans. Biomed. Circuits Syst. 7(2): 196-203 (2013) - [c10]Wei-Ming Chen, Herming Chiueh, Tsan-Jieh Chen, Chia-Lun Ho, Chi Jeng, Shun-Ting Chang, Ming-Dou Ker, Chun-Yu Lin, Ya-Chun Huang, Chia-Wei Chou, Tsun-Yuan Fan, Ming-Seng Cheng, Sheng-Fu Liang, Tzu-Chieh Chien, Sih-Yen Wu, Yu-Lin Wang, Fu-Zen Shaw, Yu-Hsing Huang, Chia-Hsiang Yang, Jin-Chern Chiou, Chih-Wei Chang, Lei-Chun Chou, Chung-Yu Wu:
A fully integrated 8-channel closed-loop neural-prosthetic SoC for real-time epileptic seizure control. ISSCC 2013: 286-287 - 2012
- [j4]Chun-Yu Lin, Tang-Long Chang, Ming-Dou Ker:
Investigation on CDM ESD events at core circuits in a 65-nm CMOS process. Microelectron. Reliab. 52(11): 2627-2631 (2012) - [c9]Shiang-Yu Tsai, Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker:
Design of ESD protection for RF CMOS power amplifier with inductor in matching network. APCCAS 2012: 467-470 - [c8]Ya-Chun Huang, Ming-Dou Ker, Chun-Yu Lin:
Design of negative high voltage generator for biphasic stimulator with soc integration consideration. BioCAS 2012: 29-32 - [c7]Ming-Dou Ker, Wei-Ling Chen, Chun-Yu Lin:
Live demonstration: Implantable stimulator for epileptic seizure suppression with loading impedance adaptability. BioCAS 2012: 78 - [c6]Li-Wei Chu, Chun-Yu Lin, Shiang-Yu Tsai, Ming-Dou Ker, Ming-Hsiang Song, Chewnpu Jou, Tse-Hua Lu, Jeng-Chou Tseng, Ming-Hsien Tsai, Tsun-Lai Hsu, Ping-Fang Hung, Tzu-Heng Chang:
Compact and low-loss ESD protection design for V-band RF applications in a 65-nm CMOS technology. ISCAS 2012: 2127-2130 - [c5]Chun-Yu Lin, Chung-Yen Su:
An improved wavelet-tree watermarking scheme. ISPACS 2012: 275-279 - [c4]Chun-Yu Lin, Yi-Ju Li, Ming-Dou Ker:
High-voltage-tolerant stimulator with adaptive loading consideration for electronic epilepsy prosthetic SoC in a 0.18-µm CMOS process. NEWCAS 2012: 125-128 - 2011
- [j3]Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker:
Design and implementation of configurable ESD protection cell for 60-GHz RF circuits in a 65-nm CMOS process. Microelectron. Reliab. 51(8): 1315-1324 (2011) - [c3]Chun-Yu Lin, Li-Wei Chu, Shiang-Yu Tsai, Ming-Dou Ker, Tse-Hua Lu, Tsun-Lai Hsu, Ping-Fang Hung, Ming-Hsiang Song, Jeng-Chou Tseng, Tzu-Heng Chang, Ming-Hsien Tsai:
Modified LC-tank ESD protection design for 60-GHz RF applications. ECCTD 2011: 57-60 - 2010
- [j2]Chun-Yu Lin, Ming-Dou Ker, Yuan-Wen Hsiao:
Design of differential low-noise amplifier with cross-coupled-SCR ESD protection scheme. Microelectron. Reliab. 50(6): 831-838 (2010) - [c2]Chun-Yu Lin, Ming-Dou Ker:
2×VDD-tolerant power-rail ESD clamp circuit with low standby leakage in 65-nm CMOS process. ISCAS 2010: 3417-3420
2000 – 2009
- 2008
- [j1]Chun-Yu Lin, Ming-Dou Ker, Guo-Xuan Meng:
Low-Capacitance and Fast Turn-on SCR for RF ESD Protection. IEICE Trans. Electron. 91-C(8): 1321-1330 (2008) - [c1]Ming-Dou Ker, Chun-Yu Lin, Guo-Xuan Meng:
ESD protection design for fully integrated CMOS RF power amplifiers with waffle-structured SCR. ISCAS 2008: 1292-1295
Coauthor Index
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