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Nishant Nukala

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2010 – 2019

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2018
[c3]
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  - conf/isqed/NautiyalNBDDSSK18
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Vivek Nautiyal, Nishant Nukala, Fakhruddin Ali Bohra, Sagar Dwivedi, Jitendra Dasani, Satinderjit Singh, Gaurav Singla, Martin Kinkade:
Logic-based row redundancy technique designed in 7nm FinFET technology for embedded SRAMs. ISQED 2018: 274-279
2014
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Nishant Nukala, Niranjan Kulkarni, Sarma B. K. Vrudhula:
Spintronic Threshold Logic Array (STLA) - A compact, low leakage, non-volatile gate array architecture. J. Parallel Distributed Comput. 74(6): 2452-2460 (2014)
2012
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Niranjan Kulkarni, Nishant Nukala, Sarma B. K. Vrudhula:
Minimizing area and power of sequential CMOS circuits using threshold decomposition. ICCAD 2012: 605-612
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Nishant Nukala, Niranjan Kulkarni, Sarma B. K. Vrudhula:
Spintronic threshold logic array (STLA) - a compact, low leakage, non-volatile gate array architecture. NANOARCH 2012: 188-195

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