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Victor M. Goncalves Martins
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2010 – 2019
- 2019
- [c5]Cezar Antônio Rigo
, Lucas M. Luza
A Fault-Tolerant Reconfigurable Platform for Communication Modules of Satellites. LATS 2019: 1-6 - 2018
- [j1]Victor M. Goncalves Martins, Paulo Ricardo Cechelero Villa, Rodrigo Travessini, Marcelo Daniel Berejuck, Eduardo Augusto Bezerra:
A dynamic partial reconfiguration design flow for permanent faults mitigation in FPGAs. Microelectron. Reliab. 83: 50-63 (2018) - 2015
- [c4]Victor M. Goncalves Martins, Joao Gabriel Reis, Horácio C. Neto
Designing Partial Bitstreams for Multiple Xilinx FPGA Partitions. FCCM 2015: 256-259 - [c3]Victor M. Goncalves Martins, Paulo Ricardo Cechelero Villa, Horácio C. Neto
A TMR Strategy with Enhanced Dependability Features Based on a Partial Reconfiguration Flow. ISVLSI 2015: 161-166 - [c2]Victor M. Goncalves Martins, Joao Gabriel Reis, Horácio C. Neto, Eduardo Augusto Bezerra
FPGA redundancy recovery based on partial bitstreams for multiple partitions. LATS 2015: 1-4 - 2014
- [c1]Victor M. Goncalves Martins, Frederico Ferlini, Djones Vinicius Lettnin, Eduardo Augusto Bezerra
Low cost fault detector guided by permanent faults at the end of FPGAs life cycle. LATW 2014: 1-6
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