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Eduardo Augusto Bezerra
Eduardo A. Bezerra – Eduardo Bezerra 0001
Person information
- affiliation: Federal University of Santa Catarina, Florianópolis, Brazil
Other persons with the same name
- Eduardo Bezerra 0002
(aka: Eduardo Bezerra da Silva) — CEFET - Federal Center of Technological Education Celso Suckow da Fonseca, Rio de Janeiro, Brazil
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2020 – today
- 2024
- [j32]Laio Oriel Seman
Benders decomposition for the energy aware task scheduling of constellations of nanosatellites. Comput. Oper. Res. 166: 106618 (2024) - [j31]Vinicius Pimenta Bernardo
Hardware-in-the-Loop Simulation of an On-Board Energy-Driven Scheduling Algorithm for CubeSats. IEEE Embed. Syst. Lett. 16(1): 69-72 (2024) - [j30]Gabriel Mariano Marcelino, André Martins Pio de Mattos, João Cláudio Elsen Barcellos
FloripaSat-2: An Open-Source Platform for CubeSats. IEEE Embed. Syst. Lett. 16(1): 77-80 (2024) - [j29]Lucas Amilton Martins, Felipe Viel
A real-time SVM-based hardware accelerator for hyperspectral images classification in FPGA. Microprocess. Microsystems 104: 104998 (2024) - [c35]Gabriel Fernandes, Augusto Vassoler, Eduardo Bezerra, Leonel Sousa, Héctor Pettenghi:
A Comprehensive Approach and Analysis of Reverse Converters for a Class of Moduli Sets. LASCAS 2024: 1-5 - 2023
- [j28]Felipe Viel
Hyperspectral Image Classification: An Analysis Employing CNN, LSTM, Transformer, and Attention Mechanism. IEEE Access 11: 24835-24850 (2023) - [j27]Laio Oriel Seman
Explainable column-generation-based genetic algorithm for knapsack-like energy aware nanosatellite task scheduling. Appl. Soft Comput. 144: 110475 (2023) - [j26]Laio Oriel Seman
Improving energy aware nanosatellite task scheduling by a branch-cut-and-price algorithm. Comput. Oper. Res. 158: 106292 (2023) - [j25]Felipe Viel
Payload-XL: A Platform for the In-Orbit Validation of the BRAVE FPGA. IEEE Embed. Syst. Lett. 15(2): 93-96 (2023) - [j24]Cezar Antônio Rigo, Laio Oriel Seman
MPPT aware task scheduling for nanosatellites using MIP-based ReLU proxy models. Expert Syst. Appl. 234: 121022 (2023) - [j23]Vanessa Prediger, Fábio Bairros, Laio Oriel Seman
RNS processor using moduli sets of the form 2n±1. Int. J. Circuit Theory Appl. 51(7): 3432-3442 (2023) - [j22]Sara Vega Martínez, Laio Oriel Seman
On-board energy scheduling optimization algorithm for nanosatellites. Int. J. Circuit Theory Appl. 51(8): 3915-3937 (2023) - [i1]Bruno Machado Pacheco, Laio Oriel Seman, Cezar Antônio Rigo, Eduardo Camponogara, Eduardo Augusto Bezerra, Leandro dos Santos Coelho:
A Graph Neural Network Approach to Nanosatellite Task Scheduling: Insights into Learning Mixed-Integer Models. CoRR abs/2303.13773 (2023) - 2022
- [j21]Eduardo Camponogara, Laio Oriel Seman
A continuous-time formulation for optimal task scheduling and quality-of-service assurance in nanosatellites. Comput. Oper. Res. 147: 105945 (2022) - [j20]Cezar Antônio Rigo
A branch-and-price algorithm for nanosatellite task scheduling to improve mission quality-of-service. Eur. J. Oper. Res. 303(1): 168-183 (2022) - [j19]Julian J. Lopez-Salamanca
Multi-sector discrete-time channel model for data link layer evaluation of CubeSat communications. Expert Syst. Appl. 203: 117375 (2022) - [j18]Laio Oriel Seman
An Energy-Aware Task Scheduling for Quality-of-Service Assurance in Constellations of Nanosatellites. Sensors 22(10): 3715 (2022) - [c34]Carla Pacheco, Mário Guimarães, Eduardo Bezerra
Exploring Data Preprocessing and Machine Learning Methods for Forecasting Worldwide Fertilizers Consumption. IJCNN 2022: 1-8 - 2021
- [j17]Cezar Antônio Rigo, Laio Oriel Seman
A nanosatellite task scheduling framework to improve mission value using fuzzy constraints. Expert Syst. Appl. 175: 114784 (2021) - [j16]Rodrigo V. M. Pereira, Laio Oriel Seman, Marcelo Daniel Berejuck, Douglas Rossi de Melo, Analúcia Schiaffino Morales
MPI hardware framework for many-core based embedded systems. Int. J. Sens. Networks 35(1): 42-56 (2021) - [j15]Victor Hugo Schulz, Gabriel Mariano Marcelino
Universal Verification Platform and Star Simulator for Fast Star Tracker Design. Sensors 21(3): 907 (2021) - [j14]Guilherme Henrique dos Santos
Static Attitude Determination Using Convolutional Neural Networks. Sensors 21(19): 6419 (2021) - [c33]Lucas Matana Luza
Technology Impact on Neutron-Induced Effects in SDRAMs: A Comparative Study. DTIS 2021: 1-6 - [c32]Douglas Rossi Melo
Design and Evaluation of Implementation Impact on a Fault-Tolerant Network-on-Chip Router. DTIS 2021: 1-6 - 2020
- [j13]Leonardo Kessler Slongo, Sara Vega Martínez, Bruno Vale Barbosa Eiterer, Eduardo Augusto Bezerra:
Nanosatellite electrical power system architectures: Models, simulations, and tests. Int. J. Circuit Theory Appl. 48(12): 2153-2189 (2020) - [j12]Gabriel Mariano Marcelino, Victor Hugo Schulz, Laio Oriel Seman
Centroid determination hardware algorithm for star trackers. Int. J. Sens. Networks 32(1): 1-14 (2020) - [j11]Julian J. Lopez-Salamanca
Finite-State Markov Chains Channel Model for CubeSats Communication Uplink. IEEE Trans. Aerosp. Electron. Syst. 56(1): 142-154 (2020)
2010 – 2019
- 2019
- [j10]Paulo Ricardo Cechelero Villa
Fault Tolerant Soft-Core Processor Architecture Based on Temporal Redundancy. J. Electron. Test. 35(1): 9-27 (2019) - [j9]Douglas R. Melo
Maximizing the Inner Resilience of a Network-on-Chip through Router Controllers Design. Sensors 19(24): 5416 (2019) - [c31]Douglas Rossi de Melo
Analyzing the Error Propagation in a Parameterizable Network-on-Chip Router. LATS 2019: 1-6 - [c30]Cezar Antônio Rigo
A Fault-Tolerant Reconfigurable Platform for Communication Modules of Satellites. LATS 2019: 1-6 - 2018
- [j8]Laio Oriel Seman
On the students' perceptions of the knowledge formation when submitted to a Project-Based Learning environment using web applications. Comput. Educ. 117: 16-30 (2018) - [j7]Victor M. Goncalves Martins, Paulo Ricardo Cechelero Villa, Rodrigo Travessini, Marcelo Daniel Berejuck, Eduardo Augusto Bezerra:
A dynamic partial reconfiguration design flow for permanent faults mitigation in FPGAs. Microelectron. Reliab. 83: 50-63 (2018) - [j6]Roger C. Goerl, Paulo Ricardo Cechelero Villa, Letícia Maria Veiras Bolzani, Eduardo Augusto Bezerra, Fabian Luis Vargas:
An efficient EDAC approach for handling multiple bit upsets in memory array. Microelectron. Reliab. 88-90: 214-218 (2018) - [j5]Laio Oriel Seman
Agent-Based Simulation of Learning Dissemination in a Project-Based Learning Context Considering the Human Aspects. IEEE Trans. Educ. 61(2): 101-108 (2018) - [c29]Lucas M. V. Pereira, Douglas R. Melo
Analysis of LEON3 systems integration for a Network-on-Chip. LATS 2018: 1-3 - [c28]Rodrigo Travessini, Paulo Ricardo Cechelero Villa, Fabian Luis Vargas, Eduardo Augusto Bezerra:
Processor core profiling for SEU effect analysis. LATS 2018: 1-6 - [c27]Paulo Ricardo Cechelero Villa, Rodrigo Travessini, Fabian Luis Vargas, Eduardo Augusto Bezerra:
Processor checkpoint recovery for transient faults in critical applications. LATS 2018: 1-6 - 2017
- [c26]Paulo Ricardo Cechelero Villa, Roger C. Goerl, Fabian Vargas, Leticia B. Poehls, Nilberto H. Medina
Analysis of single-event upsets in a Microsemi ProAsic3E FPGA. LATS 2017: 1-4 - [c25]Rodrigo V. M. Pereira, Fernando Rangel de Sousa, Eduardo Augusto Bezerra, Marcelo Daniel Berejuck:
A Digital Implementation of Eddystone Standard Using IBM 180nm Cell Library. SBESC 2017: 161-166 - 2015
- [j4]Antônio Augusto Fröhlich
Experimental analysis of solar energy harvesting circuits efficiency for low power applications. Comput. Electr. Eng. 45: 143-154 (2015) - [c24]Victor M. Goncalves Martins, Joao Gabriel Reis, Horácio C. Neto
Designing Partial Bitstreams for Multiple Xilinx FPGA Partitions. FCCM 2015: 256-259 - [c23]Paulo Ricardo Cechelero Villa, Eduardo Augusto Bezerra
A reconfigurable hardware platform for power converter control systems. ICIT 2015: 1560-1563 - [c22]Victor M. Goncalves Martins, Paulo Ricardo Cechelero Villa, Horácio C. Neto
A TMR Strategy with Enhanced Dependability Features Based on a Partial Reconfiguration Flow. ISVLSI 2015: 161-166 - [c21]Victor M. Goncalves Martins, Joao Gabriel Reis, Horácio C. Neto, Eduardo Augusto Bezerra
FPGA redundancy recovery based on partial bitstreams for multiple partitions. LATS 2015: 1-4 - 2014
- [c20]Tomás Grimm, Eduardo A. Bezerra
Hardware implementation of two key equation solvers for Reed-Solomon decoding. LATINCOM 2014: 1-6 - [c19]Victor M. Goncalves Martins, Frederico Ferlini, Djones Vinicius Lettnin, Eduardo Augusto Bezerra
Low cost fault detector guided by permanent faults at the end of FPGAs life cycle. LATW 2014: 1-6 - 2013
- [c18]Wesley Silva, Eduardo Augusto Bezerra
Automatic property generation for formal verification applied to HDL-based design of an on-board computer for space applications. LATW 2013: 1-6 - 2012
- [c17]Frederico Ferlini, Felipe A. da Silva, Eduardo Augusto Bezerra
Non-intrusive fault tolerance in soft processors through circuit duplication. LATW 2012: 1-6 - [c16]Cládio Martins, João H. Rosa, Laerte Kerber Franco, Jorge L. V. Barbosa
Towards a model to explore business opportunities in trail-aware environments. WebMedia 2012: 143-150 - 2011
- [j3]Leonardo A. Amaral, Fabiano Hessel
eCloudRFID - A mobile software framework architecture for pervasive RFID-based applications. J. Netw. Comput. Appl. 34(3): 972-979 (2011) - 2010
- [c15]Eduardo Augusto Bezerra
An adaptive communications module for on-board computers of satellites. AHS 2010: 317-324 - [c14]Leonardo A. Amaral, Fabiano Hessel, Eduardo A. Bezerra, Jerônimo C. Corrêa:
Automating the enterprise business processes in a supply chain environment through RFID services based on CEP technology. ETFA 2010: 1-4
2000 – 2009
- 2009
- [c13]Leonardo A. Amaral, Fabiano Hessel
Using CloudRFID Middleware for Fuel Supply Control of Vehicles Fleets. ETFA 2009: 1-4 - [c12]Leonardo A. Amaral, Fabiano Hessel
An Adaptative Framework Architecture for RFID Applications. SEW 2009: 15-24 - 2008
- [c11]José Carlos S. Palma, César A. M. Marcon
A Passive 915 MHz UHF RFID Tag. ISQED 2008: 348-351 - 2007
- [c10]Gabriel Marchesan Almeida, Eduardo Augusto Bezerra
A Reed-Solomon Algorithm for FPGA Area Optimization in Space Applications. AHS 2007: 243-249 - [c9]César A. M. Marcon
A 915 MHz UHF low power RFID tag. SBCCI 2007: 276-281 - [c8]José Carlos S. Palma, César A. M. Marcon
A Flexible Design Flow for a Low Power RFID Tag. VLSI-SoC 2007: 300-303 - 2006
- [c7]Fabian Vargas, Juliano Benfica, Augusto Farina, Eduardo Bezerra, Edmundo Gatti, Luis Garcia, Daniel Lupi, Fernando Hernandez:
Observing SRAM-based FPGA Robustness in EMI-exposed Environments. LATW 2006: 201-206 - 2004
- [c6]Daniel O. Bortolas, Avelino F. Zorzo, Eduardo A. Bezerra, Flávio Moreira de Oliveira:
Mutation-Like Oriented Diversity for Dependability Improvement: A Distributed System Case Study. ISCIS 2004: 917-926 - [c5]Andrei Oliveira da Silva, Paulo Henrique de Souza Schneider, Fabricio D'Avila Cabral, Ana Cristina Benso da Silva, João Batista S. de Oliveira
Towards service and user discovery on wireless networks. Mobility Management & Wireless Access Protocols 2004: 79-82 - 2001
- [j2]Eduardo Augusto Bezerra
Improving Reconfigurable Systems Reliability by Combining Periodical Test and Redundancy Techniques: A Case Study. J. Electron. Test. 17(2): 163-174 (2001) - [c4]Fernando Moraes, Alexandre M. Amory, Ney Calazans, Eduardo Bezerra, Juracy Petrini:
Using the CAN Protocol and Reconfigurable Computing Technology for Web-Based Smart House Auto. SBCCI 2001: 38-43 - 2000
- [j1]Eduardo Augusto Bezerra
A guide to migrating from microprocessor to FPGA coping with the support tool limitations. Microprocess. Microsystems 23(10): 561-572 (2000) - [c3]Eduardo Bezerra, Fabian Vargas, Michael Paul Gough:
Merging BIST and Configurable Computing Technology to Improve Availability in Space Applications. LATW 2000: 146-151
1990 – 1999
- 1998
- [c2]Fabian Vargas, Eduardo A. Bezerra, L. Wulff, Daniel Barros Jr.:
Optimizing HW/SW Codesign towards Reliability for Critical-Application Systems. Asian Test Symposium 1998: 52-57 - [c1]Fabian Vargas, Eduardo Bezerra, A. Terroso, Daniel Barros Jr.:
Reliability Verification of Fault-Tolerant Systems Design based on Mutation Analysis. SBCCI 1998: 55-59
Coauthor Index
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last updated on 2024-10-16 20:23 CEST by the dblp team
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