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Milovan Blagojevic
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2010 – 2019
- 2017
- [j4]Ben Keller
, Martin Cochet, Brian Zimmer
A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI. IEEE J. Solid State Circuits 52(7): 1863-1875 (2017) - 2016
- [j3]Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic
A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI. IEEE J. Solid State Circuits 51(4): 930-942 (2016) - [j2]Yunsup Lee, Andrew Waterman, Henry Cook, Brian Zimmer, Ben Keller, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic
An Agile Approach to Building RISC-V Microprocessors. IEEE Micro 36(2): 8-20 (2016) - [c6]Martin Cochet, Alberto Puggelli, Ben Keller, Brian Zimmer, Milovan Blagojevic, Sylvain Clerc, Philippe Roche, Jean-Luc Autran, Borivoje Nikolic
On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC. A-SSCC 2016: 125-128 - [c5]Ben Keller, Martin Cochet, Brian Zimmer, Yunsup Lee, Milovan Blagojevic, Jaehwa Kwak, Alberto Puggelli, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic
Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC. ESSCIRC 2016: 269-272 - [c4]Milovan Blagojevic, Martin Cochet, Ben Keller, Philippe Flatresse, Andrei Vladimirescu, Borivoje Nikolic
A fast, flexible, positive and negative adaptive body-bias generator in 28nm FDSOI. VLSI Circuits 2016: 1-2 - 2015
- [j1]Ruzica Jevtic
Per-Core DVFS With Switched-Capacitor Converters for Energy Efficiency in Manycore Processors. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 723-730 (2015) - [c3]Yunsup Lee, Brian Zimmer, Andrew Waterman, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic
Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking. Hot Chips Symposium 2015: 1-45 - [c2]Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic
A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI. VLSIC 2015: 316- - 2014
- [c1]Matthew Weiner, Milovan Blagojevic, Sergey Skotnikov, Andreas Burg
27.7 A scalable 1.5-to-6Gb/s 6.2-to-38.1mW LDPC decoder for 60GHz wireless networks in 28nm UTBB FDSOI. ISSCC 2014: 464-465
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