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Henk Neefs
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2000 – 2009
- 2000
- [j2]Lieven Eeckhout, Henk Neefs, Koen De Bosschere:
Early design stage exploration of fixed-length block structured architectures. J. Syst. Archit. 46(15): 1469-1486 (2000) - [c8]Lieven Eeckhout, Koen De Bosschere, Henk Neefs:
On the Feasibility of Fixed-Length Block Structured Architectures. ACAC 2000: 17-25 - [c7]Henk Neefs, Hans Vandierendonck, Koenraad De Bosschere:
A Technique for High Bandwidth and Deterministic Low Latency Load/Store Accesses to Multiple Cache Banks. HPCA 2000: 313-324 - [c6]Lieven Eeckhout, Koen De Bosschere, Henk Neefs:
Performance analysis through synthetic trace generation. ISPASS 2000: 1-6
1990 – 1999
- 1999
- [j1]Henk Neefs, Koen De Bosschere, Jan Van Campenhout
:
Exploitable levels of ILP in future processors. J. Syst. Archit. 45(9): 687-708 (1999) - [c5]Lieven Eeckhout, Henk Neefs, Koenraad De Bosschere, Jan Van Campenhout
:
Investigating the Implementation of a Block Structured Architecture in an Early Design Stage. EUROMICRO 1999: 1186- - [c4]Lieven Eeckhout, Henk Neefs, Koen De Bosschere:
Estimating IPC of a block structured instruction set architecture in an early design stage. PARCO 1999: 468-475 - [c3]Bart Goeman, Henk Neefs, Koen De Bosschere:
Increasing the efficiency of value prediction in future processors by predicting less. PARCO 1999: 518-525 - 1998
- [c2]Jan Van Campenhout, Peter Verplaetse, Henk Neefs:
ESCAPE: environment for the simulation of computer architectures for the purpose of education. WCAE@ISCA 1998: 9 - 1994
- [c1]Jo Depreitere, Henk Neefs, Herwig Van Marck
, Jan Van Campenhout, Roel Baets, Bart Dhoedt, Hugo Thienpont, Irina Veretennicoff:
An Optoelectronic 3-D Field Programmable Gate Array. FPL 1994: 352-360
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