default search action
Hongzhong Zheng
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2023
- [j16]Xinfeng Xie
, Peng Gu
MPU: Memory-centric SIMT Processor via In-DRAM Near-bank Computing. ACM Trans. Archit. Code Optim. 20(3): 40:1-40:26 (2023) - [j15]Bizhao Shi
Efficient Super-Resolution System With Block-Wise Hybridization and Quantized Winograd on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3910-3924 (2023) - [j14]Yanhong Wang
Accelerating Distributed GNN Training by Codes. IEEE Trans. Parallel Distributed Syst. 34(9): 2598-2614 (2023) - [c29]Zhiyao Li, Jiaxiang Li, Taijie Chen, Dimin Niu, Hongzhong Zheng, Yuan Xie, Mingyu Gao:
Spada: Accelerating Sparse Matrix Multiplication with Adaptive Dataflow. ASPLOS (2) 2023: 747-761 - [c28]Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie:
Klotski: DNN Model Orchestration Framework for Dataflow Architecture Accelerators. ICCAD 2023: 1-9 - [c27]Chen Bai
ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis. MICRO 2023: 268-282 - [c26]Zheng Qu
TT-GNN: Efficient On-Chip Graph Neural Network Training via Embedding Reformation and Hardware Optimization. MICRO 2023: 452-464 - [i6]Yuanwei Fang, Zihao Liu, Yanheng Lu, Jiawei Liu
NPS: A Framework for Accurate Program Sampling Using Graph Neural Network. CoRR abs/2304.08880 (2023) - 2022
- [j13]Linyong Huang
Practical Near-Data-Processing Architecture for Large-Scale Distributed Graph Neural Network. IEEE Access 10: 46796-46807 (2022) - [j12]Zhaoyang Du
Accelerating CPU-Based Sparse General Matrix Multiplication With Binary Row Merging. IEEE Access 10: 79237-79248 (2022) - [j11]Zhaoyang Du
OpSparse: A Highly Optimized Framework for Sparse General Matrix Multiplication on GPUs. IEEE Access 10: 85960-85974 (2022) - [j10]Linyong Huang, Zhe Zhang, Zhaoyang Du
EPQuant: A Graph Neural Network compression approach based on product quantization. Neurocomputing 503: 49-61 (2022) - [c25]Xingchen Li, Bingzhe Wu
Enabling High-Quality Uncertainty Quantification in a PIM Designed for Bayesian Neural Network. HPCA 2022: 1043-1055 - [c24]Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Nianxiong Tan, Xiaopeng Yu, Hongzhong Zheng, Jianyi Meng, Xiaolang Yan, Yuan Xie:
Predicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio. ICPADS 2022: 483-490 - [c23]Shuangchen Li, Dimin Niu, Yuhao Wang, Wei Han, Zhe Zhang, Tianchan Guan, Yijin Guan, Heng Liu, Linyong Huang, Zhaoyang Du
Hyperscale FPGA-as-a-service architecture for large-scale distributed graph neural network. ISCA 2022: 946-961 - [c22]Dimin Niu, Shuangchen Li, Yuhao Wang, Wei Han, Zhe Zhang, Yijin Guan, Tianchan Guan, Fei Sun, Fei Xue, Lide Duan, Yuanwei Fang, Hongzhong Zheng, Xiping Jiang, Song Wang, Fengguo Zuo, Yubing Wang, Bing Yu, Qiwei Ren, Yuan Xie:
184QPS/W 64Mb/mm23D Logic-to-DRAM Hybrid Bonding with Process-Near-Memory Engine for Recommendation System. ISSCC 2022: 1-3 - [c21]Haozhe Zhu
COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning. ISSCC 2022: 1-3 - [i5]Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Hongzhong Zheng, Yuan Xie:
Accelerating CPU-based Sparse General Matrix Multiplication with Binary Row Merging. CoRR abs/2206.06611 (2022) - [i4]Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Linyong Huang, Hongzhong Zheng, Yuan Xie:
OpSparse: a Highly Optimized Framework for Sparse General Matrix Multiplication on GPUs. CoRR abs/2206.07244 (2022) - [i3]Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Nianxiong Tan, Xiaopeng Yu, Hongzhong Zheng, Jianyi Meng, Xiaolang Yan, Yuan Xie:
Predicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio. CoRR abs/2207.13848 (2022) - 2021
- [j9]Feng Wang, Guojie Luo, Guang-Yu Sun, Yuhao Wang, Dimin Niu, Hongzhong Zheng:
Area Efficient Pattern Representation of Binary Neural Networks on RRAM. J. Comput. Sci. Technol. 36(5): 1155-1166 (2021) - [j8]Feng Wang
STAR: Synthesis of Stateful Logic in RRAM Targeting High Area Utilization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(5): 864-877 (2021) - [j7]Peng Gu
DLUX: A LUT-Based Near-Bank Accelerator for Data Center Deep Learning Training Workloads. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(8): 1586-1599 (2021) - [i2]Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie:
MPU: Towards Bandwidth-abundant SIMT Processor via Near-bank Computing. CoRR abs/2103.06653 (2021) - 2020
- [c20]Zhao Wang, Yijin Guan, Guangyu Sun, Dimin Niu, Yuhao Wang, Hongzhong Zheng, Yinhe Han:
GNN-PIM: A Processing-in-Memory Architecture for Graph Neural Networks. ACA 2020: 73-86
2010 – 2019
- 2019
- [c19]Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Rachata Ausavarungnirun, Kevin Hsieh
CoNDA: efficient cache coherence support for near-data accelerators. ISCA 2019: 629-642 - 2018
- [c18]Mu-Tien Chang, I. Stephen Choi, Dimin Niu, Hongzhong Zheng:
Performance Impact of Emerging Memory Technologies on Big Data Applications: A Latency-Programmable System Emulation Approach. ACM Great Lakes Symposium on VLSI 2018: 439-442 - [c17]Shuangchen Li, Alvin Oliver Glova, Xing Hu, Peng Gu, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Yuan Xie:
SCOPE: A Stochastic Computing Engine for DRAM-Based In-Situ Accelerator. MICRO 2018: 696-709 - 2017
- [j6]Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Kevin Hsieh
LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory. IEEE Comput. Archit. Lett. 16(1): 46-50 (2017) - [j5]Mingyu Gao, Christina Delimitrou, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Christos Kozyrakis:
DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric. IEEE Micro 37(3): 70-78 (2017) - [c16]Shuangchen Li, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Yuan Xie:
DRISA: a DRAM-based reconfigurable in-situ accelerator. MICRO 2017: 288-301 - [c15]Krishna T. Malladi, Mu-Tien Chang, Dimin Niu, Hongzhong Zheng:
FlashStorageSim: Performance Modeling for SSD Architectures. NAS 2017: 1-2 - [c14]Tyler Stocksdale, Mu-Tien Chang, Hongzhong Zheng, Frank Mueller:
Architecting HBM as a high bandwidth, high capacity, self-managed last-level cache. PDSW-DISCS@SC 2017: 31-36 - [i1]Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Nastaran Hajinazar, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu:
LazyPIM: Efficient Support for Cache Coherence in Processing-in-Memory Architectures. CoRR abs/1706.03162 (2017) - 2016
- [j4]Shaodi Wang, Henry Chaohong Hu, Hongzhong Zheng, Puneet Gupta
MEMRES: A Fast Memory System Reliability Simulator. IEEE Trans. Reliab. 65(4): 1783-1797 (2016) - [c13]Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng:
FlexDrive: A Framework to Explore NVMe Storage Solutions. HPCC/SmartCity/DSS 2016: 1115-1122 - [c12]Mingyu Gao, Christina Delimitrou, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Christos Kozyrakis:
DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric. ISCA 2016: 506-518 - [c11]Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng:
DRAMPersist: Making DRAM Systems Persistent. MEMSYS 2016: 94-95 - [c10]Krishna T. Malladi, Uksong Kang, Manu Awasthi, Hongzhong Zheng:
DRAMScale: Mechanisms to Increase DRAM Capacity. MEMSYS 2016: 325-326 - [c9]Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng:
Software-Defined Emulation Infrastructure for High Speed Storage. SYSTOR 2016: 22:1 - 2015
- [c8]Krishna T. Malladi, Mu-Tien Chang, John Ping, Hongzhong Zheng:
FAME: A Fast and Accurate Memory Emulator for New Memory System Architecture Exploration. MASCOTS 2015: 43-46 - 2014
- [j3]Kun Fang, Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu:
Mini-Rank: A Power-EfficientDDRx DRAM Memory Architecture. IEEE Trans. Computers 63(6): 1500-1512 (2014) - 2013
- [j2]Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang:
Thermal Modeling and Management of DRAM Systems. IEEE Trans. Computers 62(10): 2069-2082 (2013) - 2010
- [j1]Hongzhong Zheng, Zhichun Zhu:
Power and Performance Trade-Offs in Contemporary DRAM System Designs for Multicore Processors. IEEE Trans. Computers 59(8): 1033-1046 (2010) - [c7]Kun Fang, Hongzhong Zheng, Zhichun Zhu:
Heterogeneous Mini-rank: Adaptive, Power-Efficient Memory Architecture. ICPP 2010: 21-29
2000 – 2009
- 2009
- [c6]Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu:
Decoupled DIMM: building high-bandwidth memory system using low-speed DRAM devices. ISCA 2009: 255-266 - 2008
- [c5]Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu:
Memory Access Scheduling Schemes for Systems with Multi-Core Processors. ICPP 2008: 406-413 - [c4]Hongzhong Zheng, Jiang Lin, Zhao Zhang, Eugene Gorbatov, Howard David, Zhichun Zhu:
Mini-rank: Adaptive DRAM architecture for improving memory power efficiency. MICRO 2008: 210-221 - [c3]Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Eugene Gorbatov, Howard David, Zhao Zhang:
Software thermal management of dram memory for multicore systems. SIGMETRICS 2008: 337-348 - 2007
- [c2]Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Howard David, Zhao Zhang:
Thermal modeling and management of DRAM memory systems. ISCA 2007: 312-322 - [c1]Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang, Howard David:
DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving. ISPASS 2007: 94-104
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-07 21:21 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: