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"A 65-nm CMOS area optimized de-synchronization flow for sub-VT designs."
Christoph Thomas Muller et al. (2013)
- Christoph Thomas Muller, Steffen Malkowsky, Oskar Andersson, Babak Mohammadi, Jens Sparsø, Joachim Neves Rodrigues:
A 65-nm CMOS area optimized de-synchronization flow for sub-VT designs. VLSI-SoC 2013: 380-385
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