default search action
"A high resolution FPGA-based merged delay line TDC with nonlinearity ..."
Yuan-Ho Chen (2013)
- Yuan-Ho Chen:
A high resolution FPGA-based merged delay line TDC with nonlinearity calibration. ISCAS 2013: 2432-2435
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.