• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 290 matches

• 2006
• 
  Saleh Abdel-Hafeez, Shadi M. Harb:
  A VLSI High-Performance Priority Encoder Using Standard CMOS Library. IEEE Trans. Circuits Syst. II Express Briefs 53-II(8): 597-601 (2006)
• 
  Tommaso Addabbo, Massimo Alioto, Ada Fort, Santina Rocchi, Valerio Vignoli:
  Low-hardware complexity PRBGs based on a piecewise-linear chaotic map. IEEE Trans. Circuits Syst. II Express Briefs 53-II(5): 329-333 (2006)
• 
  Mohammad Mahdi Ahmadi:
  A new modeling and optimization of gain-boosted cascode amplifier for high-speed and low-voltage applications. IEEE Trans. Circuits Syst. II Express Briefs 53-II(3): 169-173 (2006)
• 
  Moustafa Ali, Emad Hegazi:
  A Multigigahertz Multimodulus Frequency Divider in 90-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 53-II(12): 1333-1337 (2006)
• 
  Massimo Alioto, Rosario Mita, Gaetano Palumbo:
  Design of High-Speed Power-Efficient MOS Current-Mode Logic Frequency Dividers. IEEE Trans. Circuits Syst. II Express Briefs 53-II(11): 1165-1169 (2006)
• 
  Massimo Alioto, Gaetano Palumbo:
  Design strategies of cascaded CML gates. IEEE Trans. Circuits Syst. II Express Briefs 53-II(2): 85-89 (2006)
• 
  Massimo Alioto, Luca Pancioni, Santina Rocchi, Valerio Vignoli:
  Exploiting Hysteresys in MCML Circuits. IEEE Trans. Circuits Syst. II Express Briefs 53-II(11): 1170-1174 (2006)
• 
  Miguel Ángel Gutiérrez de Anda, Arturo Sarmiento-Reyes:
  The Analytic Determination of the PPV for Second-Order Oscillators Via Time-Varying Eigenvalues. IEEE Trans. Circuits Syst. II Express Briefs 53-II(11): 1225-1229 (2006)
• 
  Vincent J. Arkesteijn, Eric A. M. Klumperink, Bram Nauta:
  Jitter requirements of the sampling clock in software radio receivers. IEEE Trans. Circuits Syst. II Express Briefs 53-II(2): 90-94 (2006)
• 
  Samir Attallah:
  The generalized Rayleigh's quotient adaptive noise subspace algorithm: a householder transformation-based implementation. IEEE Trans. Circuits Syst. II Express Briefs 53-II(1): 3-7 (2006)
• 
  Samir Attallah:
  The wavelet transform-domain LMS adaptive filter with partial subband-coefficient updating. IEEE Trans. Circuits Syst. II Express Briefs 53-II(1): 8-12 (2006)
• 
  Maria J. Avedillo, José M. Quintana, Héctor Pettenghi Roldán:
  Self-latching operation of MOBILE circuits using series-connection of RTDs and transistors. IEEE Trans. Circuits Syst. II Express Briefs 53-II(5): 334-338 (2006)
• 
  David Báez-Villegas, José Silva-Martínez:
  Quasi Rail-to-Rail Very Low-Voltage OPAMP With a Single pMOS Input Differential Pair. IEEE Trans. Circuits Syst. II Express Briefs 53-II(11): 1175-1179 (2006)
• 
  Esteban Bailo, Rafael Bru, Josep Gelonch, Sergio Romero-Vivo:
  On the Reachability Index of Positive 2-D Systems. IEEE Trans. Circuits Syst. II Express Briefs 53-II(10): 997-1001 (2006)
• 
  Fernando Antonio Pinto Barúqui, Antonio Petraglia:
  Linearly Tunable CMOS OTA With Constant Dynamic Range Using Source-Degenerated Current Mirrors. IEEE Trans. Circuits Syst. II Express Briefs 53-II(9): 797-801 (2006)
• 
  Corinne Berland, Isabelle Hibon, Jean-François Bercher, Martine Villegas, Didier Belot, Denis Pache, Vincent Le Goascoz:
  A transmitter architecture for nonconstant envelope modulation. IEEE Trans. Circuits Syst. II Express Briefs 53-II(1): 13-17 (2006)
• 
  Yuval Bistritz:
  Critical stability constraints for discrete-time linear systems. IEEE Trans. Circuits Syst. II Express Briefs 53-II(2): 95-99 (2006)
• 
  Karabi Biswas, Siddhartha Sen, Pranab Kumar Dutta:
  Realization of a Constant Phase Element and Its Performance Study in a Differentiator Circuit. IEEE Trans. Circuits Syst. II Express Briefs 53-II(9): 802-806 (2006)
• 
  Federico Bizzarri, Daniele Stellardo, Marco Storace:
  Bifurcation analysis and its experimental validation for a hysteresis circuit oscillator. IEEE Trans. Circuits Syst. II Express Briefs 53-II(7): 517-521 (2006)
• 
  Andrea Boni, Matteo Parenti, Davide Vecchi:
  Low-power GS/s track-and-hold with 10-b resolution at Nyquist in SiGe BiCMOS. IEEE Trans. Circuits Syst. II Express Briefs 53-II(6): 429-433 (2006)
• 
  Pascale Bréhonnet, Noël Tanguy, Pierre Vilbé, Léon-Claude Calvez:
  An alternative method for numerical inversion of Laplace transforms. IEEE Trans. Circuits Syst. II Express Briefs 53-II(6): 434-437 (2006)
• 
  Paolo Bruschi, Fabio Sebastiano, Nicolò Nizza:
  CMOS Transconductors With Nearly Constant Input Ranges Over Wide Tuning Intervals. IEEE Trans. Circuits Syst. II Express Briefs 53-II(10): 1002-1006 (2006)
• 
  Gabriel Caffarena, George A. Constantinides, Peter Y. K. Cheung, Carlos Carreras, Octavio Nieto-Taladriz:
  Optimal combined word-length allocation and architectural synthesis of digital signal processing circuits. IEEE Trans. Circuits Syst. II Express Briefs 53-II(5): 339-343 (2006)
• 
  Yici Cai, Bin Liu, Qiang Zhou, Xianlong Hong:
  A Two-Step Heuristic Algorithm for Minimum-Crosstalk Routing Resource Assignment. IEEE Trans. Circuits Syst. II Express Briefs 53-II(10): 1007-1011 (2006)
• 
  Yici Cai, Jingjing Fu, Xianlong Hong, Sheldon X.-D. Tan, Zuying Luo:
  Power/Ground Network Optimization Considering Decap Leakage Currents. IEEE Trans. Circuits Syst. II Express Briefs 53-II(10): 1012-1016 (2006)
• 
  Adriano Carbone, Fabrizio Palma:
  Considering noise orbital deviations on the evaluation of power density spectrum of oscillators. IEEE Trans. Circuits Syst. II Express Briefs 53-II(6): 438-442 (2006)
• 
  Francisco Cardells-Tormo, Jordi Arnabat-Benedicto:
  Flexible hardware-friendly digital architecture for 2-D separable convolution-based scaling. IEEE Trans. Circuits Syst. II Express Briefs 53-II(7): 522-526 (2006)
• 
  Francisco Cardells-Tormo, Pep-Lluis Molinet:
  Area-efficient 2-D shift-variant convolvers for FPGA-based digital image processing. IEEE Trans. Circuits Syst. II Express Briefs 53-II(2): 105-109 (2006)
• 
  Anthony Chan Carusone:
  An Equalizer Adaptation Algorithm to Reduce Jitter in Binary Receivers. IEEE Trans. Circuits Syst. II Express Briefs 53-II(9): 807-811 (2006)
• 
  Mrityunjoy Chakraborty, Rafiahamed Shaik, Moon Ho Lee:
  A Block-Floating-Point-Based Realization of the Block LMS Algorithm. IEEE Trans. Circuits Syst. II Express Briefs 53-II(9): 812-816 (2006)

skipping 260 more matches