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IET Circuits, Devices & Systems, Volume 14
Volume 14, Number 1, 2020
- Shih-Chang Hsia, Yu-Cheng Lin, Wing-Kwong Wong
, Ren-Chien Hsu:
Asynchronous control and driver for high-speed LED display with local scanning approach. 1-6 - Wameedh Nazar Flayyih
Multi-bit error control coding with limited correction for high-performance and energy-efficient network on chip. 7-16 - Samira Sayedsalehi
Characterisation of a perpendicular nanomagnetic cell and design of reversible XOR gates based on perpendicular nanomagnetic cells. 17-24 - Fei Yuan
Time-based all-digital Δ Σ time-to-digital converter with pre-skewed bi-directional gated delay line time integrator. 25-34 - P. Michael Preetam Raj
Simple design of memristive counters and their applications in automatic irrigation system. 35-40 - Kamakshi Manjari, Somanath Majhi
Pre-computed GPC of a DC-DC buck converter. 41-47 - Kokila Arunachalam, Senthil Kumar Vairakannu, Gobi Nallathambi:
Comparison and optimisation of three-level neutral point clamped dual output inverter. 48-59 - Aravinda Koithyar
Integer-N charge pump phase locked loop for 2.4 GHz application with a novel design of phase frequency detector. 60-65 - Tingyuan Nie
Constraint propagation in physical design of circuits. 66-71 - Ahmet Aktas
Design and implementation of adaptive battery charging method considering the battery temperature. 72-79 - Abdollah Norouzi Doshanlou
Efficient design of quaternary quantum comparator with only a single ancillary input. 80-87 - Feifei Deng, Guangjun Xie, Xin Cheng, Zhang Zhang, Yongqiang Zhang:
CFE: a convenient, flexible, and efficient clocking scheme for quantum-dot cellular automata. 88-92 - Lakshmi Nediyara Suresh, Bhaskar Manickam
Multiple cascode flipped active inductor-based tunable bandpass filter for fully integrated RF front-end. 93-99 - Milad Almasi, Gholamreza Karimi, Mahnaz Ranjbar, Mostafa Rahimi Azghadi:
New analogue stop-learning control module using astrocyte for neuromorphic learning. 100-106 - Khaled Humood
On-chip tunable Memristor-based flash-ADC converter for artificial intelligence applications. 107-114
Volume 14, Number 2, 2020
- Saba Feroz Memon
Wearable technology for infant health monitoring: a survey. 115-129 - Yao-Lin Jiang, Zhi-Yong Qiu
Structure preserving model reduction of second-order time-delay systems via approximate Gramians. 130-136 - Soumitra Pal, Subhankar Bose, Wing-Hung Ki
Reliable write assist low power SRAM cell for wireless sensor network applications. 137-147 - Dina A. John
Optimisation of effective parameters of multiwalled carbon nanotube-based solid-state fractional capacitor for evaluation of fractional exponent. 148-154 - Jaehun Jun, Sangsu Lee, Chulwoo Kim:
Near threshold voltage digital PLL using low voltage optimised blocks for AR display system. 155-158 - Rashmit Patel
Design of prominent SET-based high performance computing system. 159-167 - Shih-En Chen, Jhih-Syuan Lin, Hsin-Fang Li, Kuang-Wei Cheng:
Reference-less wake-up receiver with noise suppression and injection-locked clock recovery. 168-175 - Supriya Karmakar:
Three-state dynamic random-access memory (DRAM). 176-181 - Waleed Hussain Siddiqui, Goang Seong Choi:
12 bit 3.072 GS/s 32-way time-interleaved pipelined ADC with digital background calibration for wideband fully digital receiver application in 65 nm complementary metal-oxide-semiconductor. 182-191 - Bhawana Kumari
Performance and signal integrity analysis of intercalation-doped MLVGNR interconnects. 192-199 - Mohsen Hayati, Farzad Daryabari
Ultra-wideband complementary metal-oxide semiconductor low noise amplifier using CS-CG noise-cancellation and dual resonance network techniques. 200-208 - Jooseok Lee, Maengkyu Kim, Jaehong Park, Jongwon Lee
225 GHz triple-push RTD oscillator with 0.5 mW dc-power consumption. 209-215 - Sunder S. Kidambi:
Improved design of noise transfer functions with monotonic passband response for Delta-Sigma modulators. 216-221 - Wadia Jouha, Ahmed El Oualkadi
In-depth analysis of the static behaviour of a SiC MOSFET and of its associated parameters using both compact modelling and physical simulation. 222-228 - Ao Li, Qingshan Jiang, Kai Xie, Menglei Wang, Long Li, Wei Luo:
Low latency LDPC hard-decision algorithm for 5G NR. 229-234 - Rajesh Kumar
Performance of cascode Class-EF-1 PA with built-in techniques for UWB radar toward monitoring of patient actions. 235-242 - Luiz G. L. Vieira, Luiz Filipe M. Vieira, Marcos Augusto M. Vieira, Omar P. Vilela Neto
Gray-code adder with parity generator - a novel quantum-dot cellular automata implementation. 243-250 - Yang Wang, Liqiang Ding
High current operational amplifier with current limiting protection circuit. 251-259
Volume 14, Number 3, 2020
- Johny Renoald Albert
Design and development of symmetrical super-lift DC-AC converter using firefly algorithm for solar-photovoltaic applications. 261-269 - Amit Kumar
Reduction of Drain Induced Barrier Lowering in DM-HD-NA GAAFET for RF Applications. 270-275 - K. Girija Sravani, Koushik Guha, Ameen Elsinawi:
Design and optimisation of a novel structure capacitive RF MEMS switch to integrate with an antenna to improve its performance parameters. 276-287 - Syed Afzal Ahmad
Suppression of ambipolarity in tunnel-FETs using gate oxide as parameter: analysis and investigation. 288-293 - Abhilash Karnatakam Nagabhushana, Haibo Wang:
Accelerating low-voltage SAR ADC operation via comparator timing assisted and circuit adaptive tuning techniques. 294-302 - Liang Wen
65 nm sub-threshold logic standard cell library using quasi-Schmitt-trigger design scheme and inverse narrow width effect aware sizing. 303-310 - Serkan Yildiz, Ahmet Aksen, Sedat Kilinc, Bekir Siddik Binboga Yarman
Dual band stop filter design via frequency transformation and synthesis with lumped resonators. 311-315 - Filippos Pirpilidis, Lampros Pyrgas
8-bit serialised architecture of SEED block cipher for constrained devices. 316-321 - Daisuke Yamazaki, Yoshitaka Otsuki, Takafumi Hara, Nguyen Ngoc Mai Khanh, Tetsuya Iizuka
11 Gb/s 140 GHz OOK modulator with 24.6 dB isolation utilising cascaded switch and amplifier-based stages in 65 nm bulk CMOS. 322-326 - Arijit Karmakar
Adaptive analogue calibration technique to compensate electrode motion artefacts in biopotential recording. 327-332 - Mohd Adil Raushan
Design approach to improve the performance of JAMFETs. 333-339 - Siddharth Rajkumar Kala
6.25 GHz, 1 mV input resolution auxiliary circuit assisted comparator in 65 nm CMOS process. 340-346 - Ahmad Obeid
Supervised learning for early and accurate battery terminal voltage collapse detection. 347-356 - Amin Avan
High-speed energy efficient process, voltage and temperature tolerant hybrid multi-threshold 4: 2 compressor design in CNFET technology. 357-368 - Bahram Rashidi:
Flexible structures of lightweight block ciphers PRESENT, SIMON and LED. 369-380 - Stefania Perri
Parallel architecture of power-of-two multipliers for FPGAs. 381-389 - Haibo Wang, Abhilash Karnatakam Nagabhushana, Stefan Leitner:
Exploiting uncertain timing information in time-based SAR ADCs. 390-397 - Trusna Meher
Relay-based identification of Wiener model. 398-406
Volume 14, Number 4, 2020
- Huansheng Ning
Physical unclonable function: architectures, applications and challenges for dependable security. 407-424 - Bagher Razavi
Approach for low power high speed 4-bit flash analogue to digital converter. 425-431 - Hamed Aminzadeh
g m/I D functions of MOS devices" >Systematic circuit design and analysis using generalised g m/I D functions of MOS devices. 432-443 - Kaushal Nigam
Temperature sensitivity analysis of SGO metal strip JL TFET. 444-449 - Piyush Tyagi, Rishikesh Pandey:
N-bit digital comparator High-speed and area-efficient scalable N-bit digital comparator. 450-458 - Shuowei Jin, Jiaxin Chai
9 ps TDC based on multiple sampling in 0.18 μm complementary metal-oxide-semiconductor. 459-463 - Gul Faroz Ahmad Malik
Modelling for triple gate spin-FET and design of triple gate spin-FET-based binary adder. 464-470 - Girija Shankar Sahoo
Design and modelling of InGaP/GaSb tandem cell with embedded 1D GaAs quantum superlattice. 471-476 - Jasleen Kaur, Harminder Singh
Fabrication and investigation of zinc oxide nanoflowers-based piezoelectric nanogenerator. 477-483 - Pavan Kumar Reddy Boppidi, Victor Jeffry Louis, Arvind Subramaniam, Rajesh K. Tripathy, Souri Banerjee, Souvik Kundu
Implementation of fast ICA using memristor crossbar arrays for blind image source separations. 484-489 - Predrag Bosko Petrovic
New current-mode RMS-to-DC converters and four-quadrant multiplier/divider based on VDTA. 490-497 - Xi Zhu
Solution to alleviate the impact of line resistance on the crossbar array. 498-504 - Ganesh Kumar Ganjikunta
Power-efficient compensation circuit for fixed-width multipliers. 505-509 - Stephen P. Webster
Approach to modelling uniform transmission lines for broadband high-frequency applications. 510-520 - Jelena B. Radic
Ultra-low power low-complexity 3-7.5 GHz IR-UWB transmitter with spectrum tunability. 521-527 - Supriya Karmakar:
Simulator of semiconductor devices for multivalued logic. 528-536 - Hadhiq Khan
Adaptive multi-resolution framework for fast simulation of power electronic circuits. 537-546 - Lichen Feng
Fast automated on-chip artefact removal of EEG for seizure detection based on ICA-R algorithm and wavelet denoising. 547-554 - Amel Chenouf
Sizing of the CMOS 6T-SRAM cell for NBTI ageing mitigation. 555-561 - M. Arif Hussain Ansari
Circuit analysis and optimisation of the high-voltage high-efficiency IR-UWB pulse generator for ranging and radar application. 562-568
Volume 14, Number 5, 2020
- Kaya Demir
Cryptanalysis of a random number generator based on continuous-time chaos. 569-575 - Koduru Revanth
Statistical compact model extraction for skew-normal distributions. 576-585 - Sujit Kumar Patel
Area-delay and energy efficient multi-operand binary tree adder. 586-593 - Chen Yu, Lei Wang, Guangjun Xie:
Implementation of the new SCV method in quantum-dot cellular automata. 594-599 - Simon Buhr, Xin Xu
Low power analogue equaliser with adaptive digital tuning for fast ethernet. 600-610 - Álvaro Gómez-Pau
Indirect and adaptive test of analogue circuits based on preselected steady-state response measures. 611-618 - Sakineh Heidari
3D device-level simulation of charge separation from sidewall in vertical transfer gate pinned photodiode pixels for noise mitigation. 619-622 - Adeleh Ghasemi Farbod, Ehsan Rahimi
Non-adiabatic energy dissipation of quantum cellular automata logic devices. 623-628 - Sarfraz Hussain
Methodology and comparative design of an efficient 4-bit encoder with bubble error corrector for 1-GSPS flash type ADC. 629-639 - Aditya Japa, Manoj Kumar Majumder
Low area overhead DPA countermeasure exploiting tunnel transistor-based random number generator. 640-647 - Ernest Antolak
Flexible hardware approach to multi-core time-predictable systems design based on the interleaved pipeline processing. 648-659 - Ahmed B. Ayoub, Nihal Y. Ibrahim
Second-order non-quasi-static, compact model of field-effect transistor revealing terminal rectification beyond their cutoff frequency. 660-666 - Prabhat Kumar Dubey
Evaluation of circuit performance of T-shaped tunnel FET. 667-673 - Xiaoyu Ma, Yan Han, Leixiao Han, Zhi Ye:
19.5 μW ultra-low-power 13.56 MHz RFID tag based on transparent zinc-oxide thin-film transistors. 674-679 - Anil Kumar Sahu, Vivek Kumar Chandra, Ganesh Ram Sinha, Neeraj Kumar Misra
Efficient CTDSM based on GM-C quantiser and improved dynamic element matching. 680-685 - Ashish Joshi, Hitesh Shrimali, Satinder K. Sharma:
Reduced switching mode for SAR ADCs: analysis and design of SAR A-to-D algorithm with periodic standby mode circuit components. 686-694 - Suruchi Sharma
Performance investigation of asymmetric double-gate doping less tunnel FET with Si/Ge heterojunction. 695-701 - Devarshi Mrinal Das
Noise-power-area optimised design procedure for OTAs with complementary input transistors for neural amplifiers. 702-706 - Seyyedeh Shirin Saberhosseini, Bahram Azizollah-Ganji, Javad Koohsorkhi, Ayaz Ghorbani:
Design and simulation of a variable MEMS capacitor for tunable HMSIW resonator. 707-712 - Hsiung-Cheng Lin, Bo-Ren Yu, Jen-Yu Wang, Jun-Ze Lai, Jia-yang Wu, Cheng-Yu Peng, Chi-Chun Chen:
Realisation of three-dimensional geometric model in case of bike frame measurement. 713-719
Volume 14, Number 6, September 2020
- Awais Khan
Design and applications of interval observers for uncertain dynamical systems. 721-740 - Kaushik Das, Debanjali Nath, Sambhu Nath Pradhan
FPGA and ASIC realisation of EMD algorithm for real-time signal processing. 741-749 - Subhabrata Roy
Design of narrow transition band variable bandwidth digital filter. 750-757 - Sudhanshu Maheshwari:
Generalised approach for active-RC quadrature oscillator circuit with grounded capacitors. 758-761 - Behnam Babazadeh Daryan, Hassan Khalesi
Four-stage CMOS amplifier: frequency compensated using differential block. 762-769 - Reena Monica Ponnayan
One instruction set computer with optimised polarity-tunable model of double gate CNTFETs. 770-779 - Nijwm Wary
Hybrid bidirectional transceiver for multipoint-to-multipoint signalling across on-chip global interconnects. 780-787 - Juan Sebastian Moya, Luisa Fernanda Dovale, Héctor Gómez, Elkim Roa
Compact on-the-fly-enabled termination with high-current density and ESD compliance. 788-795 - Ahmet Abaci, Erkan Yüce:
Single DDCC- based simulated floating inductors and their applications. 796-804 - Mohamed Ali Belaïd
RF performance reliability of power N-LDMOS under pulsed-RF aging life test in radar application S-band. 805-810 - Li Luo, Zhekang Dong
Memristor-based stateful logic gates for multi-functional logic circuit. 811-818 - Chung-Cheng Chen, Yen-Ting Chen:
New method of finding exact frequency response for feedback amplifiers. 819-829 - Zhong Xu, Wenxiong Mo, Liangyu Gui, Zhiyuan Ma, Xianyong Xiao:
Practical test method for the sensitivity of programmable logic controller to voltage sags and short interruptions. 830-837 - Sen Wang, Yongfeng Zhang
Proposal for an input interface and multi-output structures of all-spin logic circuits based on magnetic tunnel junction. 838-845 - Salah I. Yahya
Compact wide stopband microstrip diplexer with flat channels for WiMAX and wireless applications. 846-852 - Manikandan Pappiah, Bindu Boby
Capacitor-less FVF low drop-out regulator with active feed-forward compensation and efficient slew-rate enhancer circuit. 853-859 - Amresh Kumar, Amit Krishna Dwivedi, Aminul Islam
Variation resilient reliable design of trigger pulse generator. 860-868 - Elnaz Zafarkhah, Mohammad Maymandi-Nejad, Maryam Zare:
Single-ended ring oscillators: analysis and design. 869-875 - Aryamick Singh, Manish Goswami, Kavindra Kandpal
Design of a voltage-programmed V TH compensating pixel circuit for AMOLED displays using diode-connected a-IGZO TFT. 876-880 - Vivek Sharma
IET Circuits, Devices & Systems. 881-891 - Mohamed Aboualalaa, Islam Mansour
Dual-band CPW rectenna for low input power energy harvesting applications. 892-897 - Mohammed Al-Qadasi, Abdullah Alshehri, Abdullah Alturki, Abdullah S. Almansouri, Khaled N. Salama, Hossein Fariborzi, Talal Al-Attar:
Rail-to-rail complementary input StrongARM comparator for low-power applications. 898-900 - Erkan Yüce
New mixed-mode second-generation voltage conveyor based first-order all-pass filter. 901-907 - Kai Zhang, Weifeng Lü, Peng Si, Zhifeng Zhao, Tianyu Yu:
Performance improvement of timing and power variations due to random dopant fluctuation in negative-capacitance CMOS inverters. 908-914 - Pranav M. Tripathi, Harshit Soni, Rishu Chaujar
Numerical simulation and parametric assessment of GaN buffered trench gate MOSFET for low power applications. 915-922
Volume 14, Number 7, October 2020
- Jothi Durai
Design and Analysis of Power-Efficient Quasi-Adiabatic Ternary Content Addressable Memory (QATCAM). 923-928 - Seied Ali Hosseini
Low storage power and high noise margin ternary memory cells in nanoelectronics. 929-941 - Héctor Gómez, Julian Arenas, Elkim Roa
Low-cost TRNG IPs. 942-946 - Antoine Lemaire
Open-circuit voltage decay: moving to a flexible method of characterisation. 947-955 - Sakib Reza, Apratim Roy:
3-5 GHz multifinger CMOS LNA using a simultaneous noise and impedance matching technique by a significant reduction of broadband impedance variation of metal-oxide-semiconductor field effect transistor. 956-965 - Jongwon Lee
Noise analysis of reflection-type microwave RTD amplifier. 966-971 - Badugu Divya Madhuri
Design of ternary logic gates and circuits using GNRFETs. 972-979 - Shirvani Mehdi, Mehdi Amoon
New hardware redundancy approach for making modules tolerate faults using a new fault detecting voter unit structure. 980-989 - Ahmed Liacha
Radix-2 r recoding with common subexpression elimination for multiple constant multiplication. 990-994 - Prasanna Kumar Godi
Design optimisation of multiplier-free parallel pipelined FFT on field programmable gate array. 995-1000 - Dhirendra Kumar
0.4 mW, 0.27 pJ/bit true random number generator using jitter, metastability and current starved topology. 1001-1011 - Hafiz Muhammad Bilal, Ziren Wang
Impact of receptacle degradation and loose connection on signal integrity and electrical performance repeatability. 1012-1017 - Deepak Kumar Panda
Single and double-gate based AlGaN/GaN MOS-HEMTs for the design of low-noise amplifiers: a comparative study. 1018-1025 - Chien-Ming Tsao, Yi-Fan Tsao
Compact low-noise power amplifier design and implementation for millimetre wave frequencies. 1026-1031 - Ria Bose, Jatindra Nath Roy:
Evanescent mode based compact modelling of a dual-metal double-gate tunnel field-effect transistor. 1032-1037 - Ashish Tiwari
Analysis and mathematical modelling of charge injection effect for efficient performance of CMOS imagers and CDS circuit. 1038-1048 - Vijay Rao Kumbhare
Performance analysis of mixed CNT bundle interconnects at 10 nm technology. 1049-1057 - Faisal Bashir
Metal controlled nanoscaled dopingless MOSFET on selective/partial buried oxide. 1058-1064 - Kapil Bhardwaj, Mayank Srivastava:
Floating memristor and inverse memristor emulation configurations with electronic/resistance controllability. 1065-1076 - Trapti Sharma
Design of energy-efficient ternary circuits using differential cascode voltage switch strategies in carbon nanotube field effect transistor technology. 1077-1085 - Taeho Oh, Dilruba Parvin, Omiya Hassan, Samira Shamsir, Syed Kamrul Islam:
MPPT integrated DC-DC boost converter for RF energy harvester. 1086-1091 - Arya Lekshmi Jagath, Thulasiraman Nandha Kumar
Analytical modelling of tantalum/titanium oxide-based multi-layer selector to eliminate sneak path current in RRAM arrays. 1092-1098 - Ridvan Umaz
Self-startup soil energy harvesting system with a quick startup circuit. 1099-1103 - Naorem Yaipharenba Meitei, Krishna Lal Baishnab, Gaurav Trivedi:
3D-IC partitioning method based on genetic algorithm. 1104-1109 - Viktor Tomov, Ivo Iliev
High resolution FPGA pulse width modulation control of full-bridge DC-DC converters. 1110-1116
Volume 14, Number 8, November 2020
- Juan Pablo Ochoa Avilés, Valceres Vieira Rocha e Silva, Fernando Lessa Tofoli
Household induction cooking system based on a grid-connected photovoltaic system. 1117-1128 - Xiangwei Guo, Jiahao Geng, Liu Zhen, Longyun Kang, Xiaozhuo Xu:
Active balancing method for series battery pack based on flyback converter. 1129-1134 - Karan Gumber, Meenakshi Rawat:
Broadband RF-predistortion supporting carrier aggregation. 1135-1144 - Lei Wang, Qian Wu, Yang Gu, Changyuan Chang, Chang Chen:
Design of a high-precision constant voltage flyback converter. 1145-1152 - Yue Li, Fei Yuan
All-digital power-efficient integrating frequency difference-to-digital converter for GHz frequency-locking. 1153-1159 - Satya Ranjan Sahu, Bandan Kumar Bhoi
Fast signed multiplier using Vedic Nikhilam algorithm. 1160-1166 - Ramesh Rathinam
Analysis of black phosphorus double gate MOSFET using hybrid method for analogue/RF application. 1167-1172 - Ibrahim Ethem Saçu
Design and realisation of a fractional-order sinusoidal oscillator. 1173-1184 - Duc-An Pham, Bo-Cheng Lai:
Dataflow and microarchitecture co-optimisation for sparse CNN on distributed processing element accelerator. 1185-1194 - Yefei Zhang, Zunchao Li:
IET Circuits, Devices & Systems. 1195-1200 - Linh Duc Tran
Extended Boolean algebra for asynchronous quasi-delay-insensitive logic. 1201-1213 - Ashima Sharma
High gain operational amplifier and a comparator with a-IGZO TFTs. 1214-1219 - Michal Tadeusiewicz, Stanislaw Halgas
Soft fault diagnosis of non-linear circuits having multiple DC solutions. 1220-1227 - Gunjan Mittal Roy
Performance of ultra-wide band DCBLNA with suspended strip line radiator for human breast cancer diagnosis medical imaging application. 1228-1234 - Alireza Abolhasani
Fast-locking PLL based on a novel PFD-CP structure and reconfigurable loop filter. 1235-1242 - Safa Berrima, Yves Blaquière, Yvon Savaria:
Fine resolution delay tuning method to improve the linearity of an unbalanced time-to-digital converter on a Xilinx FPGA. 1243-1252 - Shaheryar Najam, Jameel Ahmed:
Run-time neuro-fuzzy type-2 controller for power optimisation of GP-GPU architecture. 1253-1257 - Reza Abbasi-Kesbi
Developed wireless sensor network to supervise the essential parameters in greenhouses for internet of things applications. 1258-1264 - Kobra Behzadi, Masoud Baghelani
Bandwidth controlled weakly connected MEMS resonators based narrowband filter. 1265-1271 - Andrzej Malcher, Adam Kristof
Digitally programmable modified current differencing transconductance amplifier in 40-nm technology: design flow, parameter analyses and applications. 1272-1282 - Siva Kotamraju
Improved reverse recovery characteristics obtained in 4H-SiC double-trench superjunction MOSFET with an integrated p-type Schottky diode. 1283-1288 - Avtar Singh
Split gated silicon nanotube FET for bio-sensing applications. 1289-1294 - Jing Zhao
Low-power, high-linearity transconductor with a high tolerance for process and temperature variations. 1295-1304 - Yuying Zhu, Weiqiang Liu
Design, evaluation and application of approximate-truncated Booth multipliers. 1305-1317 - Vijeyakumar Krishnasamy Natarajan, Peter Thiagarajan Nelson Kingsley Joel, Shree Harpreet Singh Jatana, Natarajan Saravanakumar
Area Efficient Parallel Median Filter Using Approximate Comparator and Faithful Adder. 1318-1331
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