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Salvatore Pontarelli
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2020 – today
- 2024
- [j63]Raphaël Azorin
, Andrea Monterubbiano
Taming the Elephants: Affordable Flow Length Prediction in the Data Plane. Proc. ACM Netw. 2(CoNEXT1): 1-24 (2024) - [c82]Jesús Gutiérrez
Seamless Integration of Efficient 6G Wireless Technologies for Communication and Sensing Enabling Ecosystems. AIAI Workshops 2024: 190-201 - [c81]Andrea Monterubbiano
Lightweight Acquisition and Ranging of Flows in the Data Plane. SIGMETRICS/Performance (Abstracts) 2024: 21-22 - 2023
- [j62]Andrea Monterubbiano
SPADA: A Sparse Approximate Data Structure Representation for Data Plane Per-flow Monitoring. PACMNET 1(CoNEXT3): 27:1-27:25 (2023) - [j61]Andrea Monterubbiano
Lightweight Acquisition and Ranging of Flows in the Data Plane. Proc. ACM Meas. Anal. Comput. Syst. 7(3): 44:1-44:24 (2023) - [j60]Pedro Reviriego
Bitwise Signature Comparison: Enabling More Efficient Similarity Estimation. IEEE Trans. Emerg. Top. Comput. 11(3): 798-804 (2023) - [j59]Marco Faltelli
Metronome: Adaptive and Precise Intermittent Packet Retrieval in DPDK. IEEE/ACM Trans. Netw. 31(3): 979-993 (2023) - [c80]Alessandro Rivitti, Roberto Bifulco, Angelo Tulumello, Marco Bonola, Salvatore Pontarelli:
eHDL: Turning eBPF/XDP Programs into Hardware Designs for the NIC. ASPLOS (3) 2023: 208-223 - [c79]Andrea Monterubbiano
Memory-efficient Random Forests in FPGA SmartNICs. CoNEXT (Companion) 2023: 55-56 - 2022
- [j58]Marco Spaziani Brunella, Giacomo Belocchi, Marco Bonola, Salvatore Pontarelli, Giuseppe Siracusano, Giuseppe Bianchi, Aniello Cammarano, Alessandro Palumbo, Luca Petrucci, Roberto Bifulco:
hXDP: Efficient software packet processing on FPGA NICs. Commun. ACM 65(8): 92-100 (2022) - [j57]Pedro Reviriego, Gil Levy, Matty Kadosh, Salvatore Pontarelli:
Algorithmic TCAMs: Implementing Packet Classification Algorithms in Hardware. IEEE Commun. Mag. 60(9): 60-66 (2022) - [j56]Pedro Reviriego
Attacking Adaptive Cuckoo Filters: Too Much Adaptation Can Kill You. IEEE Trans. Netw. Serv. Manag. 19(4): 5224-5236 (2022) - [j55]Kerem Arikan, Alessandro Palumbo
Processor Security: Detecting Microarchitectural Attacks via Count-Min Sketches. IEEE Trans. Very Large Scale Integr. Syst. 30(7): 938-951 (2022) - [c78]Andrea Monterubbiano, Raphaël Azorin
Learned data structures for per-flow measurements. StudentWorkshop@CoNEXT 2022: 42-43 - 2021
- [j54]Valerio Bruschi
FlowFight: High performance-low memory top-k spreader detection. Comput. Networks 196: 108239 (2021) - [j53]Valerio Bruschi
More Accurate Streaming Cardinality Estimation With Vectorized Counters. IEEE Netw. Lett. 3(2): 75-79 (2021) - [c77]Pedro Reviriego, Salvatore Pontarelli:
Perfect cuckoo filters. CoNEXT 2021: 205-211 - [c76]Valerio Bruschi, Salvatore Pontarelli, Jerome Tollet, David Barach, Giuseppe Bianchi:
DEMO: top-k cardinality estimation with HyperLogLog sketches. ICIN 2021: 83-85 - [i12]Marco Faltelli, Giacomo Belocchi, Francesco Quaglia, Salvatore Pontarelli, Giuseppe Bianchi:
Metronome: adaptive and precise intermittent packet retrieval in DPDK. CoRR abs/2103.13263 (2021) - 2020
- [j52]Pedro Reviriego
Improving Packet Flow Counting With Fingerprint Counting. IEEE Commun. Lett. 24(1): 76-80 (2020) - [j51]Pedro Reviriego
Fast Updates for Line-Rate HyperLogLog-Based Cardinality Estimation. IEEE Commun. Lett. 24(12): 2737-2741 (2020) - [j50]Michael Mitzenmacher, Salvatore Pontarelli, Pedro Reviriego
Adaptive Cuckoo Filters. ACM J. Exp. Algorithmics 25: 1-20 (2020) - [j49]Pedro Reviriego
Cuckoo Filters and Bloom Filters: Comparison and Application to Packet Classification. IEEE Trans. Netw. Serv. Manag. 17(4): 2690-2701 (2020) - [c75]Marco Faltelli
Metronome: adaptive and precise intermittent packet retrieval in DPDK. CoNEXT 2020: 406-420 - [c74]Pedro Reviriego, Salvatore Pontarelli:
When filtering is not possible caching negatives with fingerprints comes to the rescue. CoNEXT 2020: 435-442 - [c73]Jim Zou, Peter Legg, Romeo Santiago, Valerio Bruschi, Richard Graham, Salvatore Pontarelli, Giacomo Belocchi, Luca Petrucci, Paula Ciria, Carles Teres, Juan Agusti, Manuel Alfageme:
Europe's First 5G-Ready Railway Trial Utilizing Integrated Optical Passive WDM Access and Broadband Millimeter-Wave to Deliver Multi-Gbit/s Seamless Connectivity. ECOC 2020: 1-3 - [c72]Valerio Bruschi, Marco Faltelli
Offloading Online MapReduce tasks with Stateful Programmable Data Planes. ICIN 2020: 17-22 - [c71]Anees Ullah, Salvatore Pontarelli, Pedro Reviriego:
FlexTCAM: Beyond Memory Based TCAM Emulation on FPGAs. NFV-SDN 2020: 110-113 - [c70]Marco Spaziani Brunella, Giacomo Belocchi, Marco Bonola, Salvatore Pontarelli, Giuseppe Siracusano, Giuseppe Bianchi, Aniello Cammarano, Alessandro Palumbo, Luca Petrucci, Roberto Bifulco:
hXDP: Efficient Software Packet Processing on FPGA NICs. OSDI 2020: 973-990 - [i11]Marco Spaziani Brunella, Giacomo Belocchi, Marco Bonola, Salvatore Pontarelli, Giuseppe Siracusano, Giuseppe Bianchi, Aniello Cammarano, Alessandro Palumbo, Luca Petrucci, Roberto Bifulco:
hXDP: Efficient Software Packet Processing on FPGA NICs. CoRR abs/2010.14145 (2020)
2010 – 2019
- 2019
- [j48]Leonardo Linguaglossa
High-speed data plane and network functions virtualization by vectorizing packet processing. Comput. Networks 149: 187-199 (2019) - [j47]Pedro Reviriego
CFBF: Reducing the Insertion Time of Cuckoo Filters With an Integrated Bloom Filter. IEEE Commun. Lett. 23(10): 1857-1861 (2019) - [j46]Salvatore Pontarelli
Smashing OpenFlow's "atomic" actions: Programmable data plane packet manipulation in hardware. Int. J. Netw. Manag. 29(1) (2019) - [j45]Pedro Reviriego, Salvatore Pontarelli, Gil Levy:
CuCoTrack: Cuckoo filter based connection tracking. Inf. Process. Lett. 147: 55-60 (2019) - [j44]Leonardo Linguaglossa, Stanislav Lange, Salvatore Pontarelli
Survey of Performance Acceleration Techniques for Network Function Virtualization. Proc. IEEE 107(4): 746-764 (2019) - [j43]Giuseppe Bianchi, Michael Welzl
XTRA: Towards Portable Transport Layer Functions. IEEE Trans. Netw. Serv. Manag. 16(4): 1507-1521 (2019) - [j42]James Daly, Valerio Bruschi
TupleMerge: Fast Software Packet Processing for Online Packet Classification. IEEE/ACM Trans. Netw. 27(4): 1417-1431 (2019) - [j41]Pedro Reviriego
Error Detection and Correction in SRAM Emulated TCAMs. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 486-490 (2019) - [j40]Pedro Reviriego
PR-TCAM: Efficient TCAM Emulation on Xilinx FPGAs Using Partial Reconfiguration. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1952-1956 (2019) - [c69]Shanshan Liu, Pedro Reviriego, Kazuteru Namba, Salvatore Pontarelli, Liyi Xiao, Fabrizio Lombardi:
Low Redundancy Double Error Correction Spotty Codes Combined with Gray Coding for 64 Data Bits Memories of 4-bit Multilevel Cells. DFT 2019: 1-4 - [c68]Angelo Tulumello, Giacomo Belocchi, Marco Bonola
Pushing Services to the Edge Using a Stateful Programmable Dataplane. EuCNC 2019: 389-393 - [c67]Minseok Kwon, Vijay Shankar, Salvatore Pontarelli, Pedro Reviriego:
A Fingerprint-based Bloom Filter with Deletion Capabilities. EuCNC 2019: 453-458 - [c66]Daniel Camps-Mur, Kostas Katsalis, Igor Freire
5G-PICTURE: A Programmable Multi-tenant 5G Compute-RAN-Transport Infrastructure. EuCNC 2019: 469-474 - [c65]Salvatore Pontarelli, Roberto Bifulco, Marco Bonola, Carmelo Cascone, Marco Spaziani Brunella, Valerio Bruschi, Davide Sanvito, Giuseppe Siracusano, Antonio Capone, Michio Honda, Felipe Huici:
FlowBlaze: Stateful Packet Processing in Hardware. NSDI 2019: 531-548 - [c64]Jorge Martínez, Pedro Reviriego, Salvatore Pontarelli:
Accelerating Packet Classification with Two Class Cuckoo Filters (TC-CF). SDS 2019: 248-253 - 2018
- [j39]Carmelo Cascone, Roberto Bifulco, Salvatore Pontarelli, Antonio Capone:
Relaxing state-access constraints in stateful programmable data planes. Comput. Commun. Rev. 48(1): 3-9 (2018) - [j38]David Barach, Leonardo Linguaglossa, Damjan Marion, Pierre Pfister, Salvatore Pontarelli, Dario Rossi:
High-Speed Software Data Plane via Vectorized Packet Processing. IEEE Commun. Mag. 56(12): 97-103 (2018) - [j37]Maria K. Michael
Guest Editorial: Special Section on Defect and Fault Tolerance in VLSI and Nanotechnology. IEEE Trans. Emerg. Top. Comput. 6(4): 447-449 (2018) - [j36]Salvatore Pontarelli
EMOMA: Exact Match in One Memory Access. IEEE Trans. Knowl. Data Eng. 30(11): 2120-2133 (2018) - [c63]Michael Mitzenmacher, Salvatore Pontarelli, Pedro Reviriego:
Adaptive Cuckoo Filters. ALENEX 2018: 36-47 - [c62]Marco Spaziani Brunella, Salvatore Pontarelli, Marco Bonola
V- PMP: A VLIW Packet Manipulator Processor. EuCNC 2018: 1-9 - [c61]Salvatore Pontarelli, Giuseppe Bianchi, Michael Welzl
A Programmable Hardware Calendar for High Resolution Pacing. HPSR 2018: 1-6 - [c60]Pedro Reviriego, Salvatore Pontarelli, Anees Ullah, Ali Zahir, Giuseppe Bianchi:
Multiple Hash Matching Units (MHMU): An Algorithmic Ternary Content Addressable Memory Design for Field Programmable Gate Arrays. HPSR 2018: 1-6 - [c59]David Barach, Leonardo Linguaglossa, Damjan Marion, Pierre Pfister, Salvatore Pontarelli, Dario Rossi, Jerome Tollet:
Batched packet processing for high-speed software data plane functions. INFOCOM Workshops 2018: 1-2 - [c58]Giuseppe Bianchi, Michael Welzl
A Fully Portable TCP Implementation Using XFSMs. SIGCOMM Posters and Demos 2018: 99-101 - [i10]Pedro Reviriego, Salvatore Pontarelli, Gil Levy:
CuCoTrack: Cuckoo Filter Based Connection Tracking. CoRR abs/1806.03611 (2018) - 2017
- [j35]Gil Levy, Salvatore Pontarelli, Pedro Reviriego
Flexible Packet Matching with Single Double Cuckoo Hash. IEEE Commun. Mag. 55(6): 212-217 (2017) - [j34]Pedro Reviriego
A method to protect Cuckoo filters from soft errors. Microelectron. Reliab. 72: 85-89 (2017) - [j33]Marco Bonola, Giuseppe Bianchi, Giulio Picierro
StreaMon: A Data-Plane Programming Abstraction for Software-Defined Stream Monitoring. IEEE Trans. Dependable Secur. Comput. 14(6): 664-678 (2017) - [c57]Marco Bonola
Implementing advanced network functions for datacenters with stateful programmable data planes. LANMAN 2017: 1-6 - [c56]Marco Bonola
Demo: Implementing advanced network functions with stateful programmable data planes. LANMAN 2017: 1-2 - [c55]Salvatore Pontarelli, Marco Bonola
Smashing SDN "built-in" actions: Programmable data plane packet manipulation in hardware. NetSoft 2017: 1-9 - [c54]Salvatore Pontarelli, Valerio Bruschi, Marco Bonola
On offloading programmable SDN controller tasks to the embedded microcontroller of stateful SDN dataplanes. NetSoft 2017: 1-4 - [c53]Luca Petrucci, Marco Bonola
Implementing iptables using a programmable stateful data plane abstraction: Demo. SOSR 2017: 193-194 - [c52]Giuseppe Bianchi, Marco Bonola
Implementing a Per-Flow Token Bucket Using Open Packet Processor. TIWDC 2017: 251-262 - [i9]Carmelo Cascone, Roberto Bifulco, Salvatore Pontarelli:
Relaxing constraints in stateful network data plane design. CoRR abs/1702.02347 (2017) - [i8]Carmelo Cascone, Roberto Bifulco, Salvatore Pontarelli, Antonio Capone:
Relaxing state-access constraints in stateful programmable data planes. CoRR abs/1703.05442 (2017) - [i7]Michael Mitzenmacher, Salvatore Pontarelli, Pedro Reviriego:
Adaptive Cuckoo Filters. CoRR abs/1704.06818 (2017) - [i6]Salvatore Pontarelli, Pedro Reviriego, Michael Mitzenmacher:
EMOMA: Exact Match in One Memory Access. CoRR abs/1709.04711 (2017) - 2016
- [j32]Salvatore Pontarelli, Pedro Reviriego
Cuckoo Cache: A Technique to Improve Flow Monitoring Throughput. IEEE Internet Comput. 20(4): 46-53 (2016) - [j31]Salvatore Pontarelli, Pedro Reviriego, Juan Antonio Maestro
Improving counting Bloom filter performance with fingerprints. Inf. Process. Lett. 116(4): 304-309 (2016) - [j30]Salvatore Pontarelli
Parallel d-Pipeline: A Cuckoo Hashing Implementation for Increased Throughput. IEEE Trans. Computers 65(1): 326-331 (2016) - [j29]Cristiana Bolchini, Sandip Kundu, Salvatore Pontarelli:
Guest Editorial: IEEE Transactions on Computers and IEEE Transactions on Nanotechnology Joint Special Section on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. IEEE Trans. Computers 65(3): 677-678 (2016) - [j28]Michael Mitzenmacher, Pedro Reviriego
OMASS: One Memory Access Set Separation. IEEE Trans. Knowl. Data Eng. 28(7): 1940-1943 (2016) - [c51]Giuseppe Bianchi, Marco Bonola
On the feasibility of "breadcrumb" trails within OpenFlow switches. EuCNC 2016: 122-127 - [c50]Minseok Kwon, Pedro Reviriego, Salvatore Pontarelli:
A length-aware cuckoo filter for faster IP lookup. INFOCOM Workshops 2016: 1071-1072 - [i5]Giuseppe Bianchi, Marco Bonola, Salvatore Pontarelli, Davide Sanvito, Antonio Capone, Carmelo Cascone:
Open Packet Processor: a programmable architecture for wire speed platform-independent stateful in-network processing. CoRR abs/1605.01977 (2016) - [i4]Luca Petrucci, Nicola Bonelli, Marco Bonola, Gregorio Procissi, Carmelo Cascone, Davide Sanvito, Salvatore Pontarelli, Giuseppe Bianchi, Roberto Bifulco:
Towards a Stateful Forwarding Abstraction to Implement Scalable Network Functions in Software and Hardware. CoRR abs/1611.02853 (2016) - 2015
- [j27]Marco Ottavi
Dependable Multicore Architectures at Nanoscale: The View From Europe. IEEE Des. Test 32(2): 17-28 (2015) - [j26]Salvatore Pontarelli
Low Delay Single Symbol Error Correction Codes Based on Reed Solomon Codes. IEEE Trans. Computers 64(5): 1497-1501 (2015) - [j25]Pedro Reviriego, Salvatore Pontarelli
A Synergetic Use of Bloom Filters for Error Detection and Correction. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 584-587 (2015) - [j24]Pedro Reviriego, Salvatore Pontarelli
A Class of SEC-DED-DAEC Codes Derived From Orthogonal Latin Square Codes. IEEE Trans. Very Large Scale Integr. Syst. 23(5): 968-972 (2015) - [j23]Luis J. Saiz-Adalid
MCU Tolerance in SRAMs Through Low-Redundancy Triple Adjacent Error Correction. IEEE Trans. Very Large Scale Integr. Syst. 23(10): 2332-2336 (2015) - [c49]Pedro Reviriego, Salvatore Pontarelli, Juan Antonio Maestro
A method to protect Bloom filters from soft errors. DFTS 2015: 80-84 - [c48]Yuanfan Yang, Jimson Mathew, Marco Ottavi
2T2M memristor based TCAM cell for low power applications. DTIS 2015: 1-6 - [c47]Salvatore Pontarelli, Marco Bonola
Stateful OpenFlow: Hardware proof of concept. HPSR 2015: 188-195 - [c46]Pedro Reviriego, Salvatore Pontarelli, Gil Levy:
Improving energy efficiency of Ethernet switching with modular Cuckoo hashing. OnlineGreenComm 2015: 7-10 - 2014
- [j22]Pedro Reviriego
Energy Efficient Exact Matching for Flow Identification with Cuckoo Affinity Hashing. IEEE Commun. Lett. 18(5): 885-888 (2014) - [j21]Salvatore Pontarelli
Efficient Flow Sampling With Back-Annotated Cuckoo Hashing. IEEE Commun. Lett. 18(10): 1695-1698 (2014) - [j20]Salvatore Pontarelli
Improving the performance of Invertible Bloom Lookup Tables. Inf. Process. Lett. 114(4): 185-191 (2014) - [j19]Lorena Anghel
Editorial. Microprocess. Microsystems 38(6): 565-566 (2014) - [j18]Pedro Reviriego, Salvatore Pontarelli
Efficient implementation of error correction codes in hash tables. Microelectron. Reliab. 54(1): 338-340 (2014) - [j17]Pedro Reviriego
A Method to Extend Orthogonal Latin Square Codes. IEEE Trans. Very Large Scale Integr. Syst. 22(7): 1635-1639 (2014) - [c45]Yuanfan Yang, Jimson Mathew, Dhiraj K. Pradhan, Marco Ottavi
Complementary resistive switch based stateful logic operations using material implication. DATE 2014: 1-4 - [c44]Giuseppe Bianchi
StreaMon: A software-defined monitoring platform. ITC 2014: 1-6 - [i3]Giuseppe Bianchi, Marco Bonola, Antonio Capone, Carmelo Cascone, Salvatore Pontarelli:
Towards Wire-speed Platform-agnostic Control of OpenFlow Switches. CoRR abs/1409.0242 (2014) - 2013
- [j16]Salvatore Pontarelli
Error Detection and Correction in Content Addressable Memories by Using Bloom Filters. IEEE Trans. Computers 62(6): 1111-1126 (2013) - [j15]Salvatore Pontarelli
Low Complexity Concurrent Error Detection for Complex Multiplication. IEEE Trans. Computers 62(9): 1899-1903 (2013) - [j14]Salvatore Pontarelli
Traffic-Aware Design of a High-Speed FPGA Network Intrusion Detection System. IEEE Trans. Computers 62(11): 2322-2334 (2013) - [j13]Pedro Reviriego, Salvatore Pontarelli
A Method to Construct Low Delay Single Error Correction Codes for Protecting Data Bits Only. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(3): 479-483 (2013) - [j12]Pedro Reviriego, Salvatore Pontarelli
Reducing the Cost of Implementing Error Correction Codes in Content Addressable Memories. IEEE Trans. Circuits Syst. II Express Briefs 60-II(7): 432-436 (2013) - [j11]Pedro Reviriego
An Efficient Technique to Protect Serial Shift Registers Against Soft Errors. IEEE Trans. Circuits Syst. II Express Briefs 60-II(8): 512-516 (2013) - [j10]Pedro Reviriego
Concurrent Error Detection for Orthogonal Latin Squares Encoders and Syndrome Computation. IEEE Trans. Very Large Scale Integr. Syst. 21(12): 2334-2338 (2013) - [c43]Gian Carlo Cardarilli
A Reconfigurable Functional Unit for Modular Operations. ApplePies 2013: 141-152 - [c42]Salvatore Pontarelli, Marco Ottavi
Error detection in ternary CAMs using bloom filters. DATE 2013: 1474-1479 - [c41]Stefano Campitelli, Marco Ottavi
F-DICE: A multiple node upset tolerant flip-flop for highly radioactive environments. DFTS 2013: 107-111 - [i2]Giuseppe Bianchi, Marco Bonola, Giulio Picierro, Salvatore Pontarelli, Marco Monaci:
StreaMon: a data-plane programming abstraction for Software-defined Stream Monitoring. CoRR abs/1311.2442 (2013) - 2012
- [j9]Salvatore Pontarelli
On the use of Karatsuba formula to detect errors in GF((2(sup)n(/sup))(sup)2(/sup)) multipliers. IET Circuits Devices Syst. 6(3): 152-158 (2012) - [j8]Salvatore Pontarelli
Optimized Implementation of RNS FIR Filters Based on FPGAs. J. Signal Process. Syst. 67(3): 201-212 (2012) - [c40]Pietro Albicocco
Karatsuba implementation of FIR filters. ACSCC 2012: 1111-1114 - [c39]Yang Lu, Fabrizio Lombardi, Salvatore Pontarelli
On the design of two single event tolerant slave latches for scan delay testing. DFT 2012: 67-72 - [c38]Cristiana Bolchini
High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies. DFT 2012: 121-125 - [c37]Angelo Giuseppe Ruotolo, Marco Ottavi, Salvatore Pontarelli, Fabrizio Lombardi:
A novel write-scheme for data integrity in memristor-based crossbar memories. NANOARCH 2012: 168-173 - 2011
- [c36]Salvatore Pontarelli, Marco Ottavi
Feedback based droop mitigation. DATE 2011: 879-882 - [c35]Nachiket Rajderkar, Marco Ottavi
On the Effects of Intra-gate Resistive Open Defects in Gates at Nanoscaled CMOS. DFT 2011: 309-315 - [c34]Salvatore Pontarelli
Hardware-Based "on-the-fly" Per-flow Scan Detector Pre-filter (Poster). TMA 2011: 181-184 - [c33]Salvatore Pontarelli
Anti-evasion Technique for Packet Based Pre-filtering for Network Intrusion Detection Systems (Poster). TMA 2011: 185-188 - 2010
- [c32]Anant Narayan Hariharan, Salvatore Pontarelli
Modeling Open Defects in Nanometric Scale CMOS. DFT 2010: 249-257 - [c31]Salvatore Pontarelli
Error Detection and Correction in Content Addressable Memories. DFT 2010: 420-428 - [c30]Salvatore Pontarelli
Exploiting Dynamic Reconfiguration for FPGA Based Network Intrusion Detection Systems. FPL 2010: 10-14 - [c29]Marco Ottavi
High throughput and low power dissipation in QCA pipelines using Bennett clocking. NANOARCH 2010: 17-22
2000 – 2009
- 2009
- [c28]Salvatore Pontarelli
Error Correction Codes for SEU and SEFI Tolerant Memory Systems. DFT 2009: 425-430 - [c27]Salvatore Pontarelli
Error detection in addition chain based ECC Point Multiplication. IOLTS 2009: 192-194 - 2008
- [j7]Salvatore Pontarelli
Analysis and Evaluations of Reliability of Reconfigurable FPGAs. J. Electron. Test. 24(1-3): 105-116 (2008) - [c26]Salvatore Pontarelli
A Novel Error Detection and Correction Technique for RNS Based FIR Filters. DFT 2008: 436-444 - [c25]Gian Carlo Cardarilli
On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAs. ICECS 2008: 602-605 - [c24]Salvatore Pontarelli
Totally Fault Tolerant RNS Based FIR Filters. IOLTS 2008: 192-194 - 2007
- [j6]Sanjukta Bhanja, Marco Ottavi
QCA Circuits for Robust Coplanar Crossing. J. Electron. Test. 23(2-3): 193-210 (2007) - [j5]Gian Carlo Cardarilli
Analysis of Errors and Erasures in Parity Sharing RS Codecs. IEEE Trans. Computers 56(12): 1721-1726 (2007) - [j4]Gian Carlo Cardarilli
Concurrent Error Detection in Reed-Solomon Encoders and Decoders. IEEE Trans. Very Large Scale Integr. Syst. 15(7): 842-846 (2007) - [c23]Salvatore Pontarelli
Optimization of Self Checking FIR filters by means of Fault Injection Analysis. DFT 2007: 96-104 - [c22]Salvatore Pontarelli
Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders. IOLTS 2007: 194-196 - [i1]Luca Schiano, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli, Adelio Salsano:
On the Analysis of Reed Solomon Coding for Resilience to Transient/Permanent Faults in Highly Reliable Memories. CoRR abs/0710.4750 (2007) - 2006
- [j3]Gian Carlo Cardarilli
Fault Localization, Error Correction, and Graceful Degradation in Radix 2 Signed Digit-Based Adders. IEEE Trans. Computers 55(5): 534-540 (2006) - [c21]Sanjukta Bhanja, Marco Ottavi
Novel designs for thermally robust coplanar crossing in QCA. DATE 2006: 786-791 - [c20]Salvatore Pontarelli
Reliability Evaluation of Repairable/Reconfigurable FPGAs. DFT 2006: 227-235 - [c19]Marco Ottavi
Design and Evaluation of a Hardware on-line Program-Flow Checker for Embedded Microcontrollers. DFT 2006: 371-379 - [c18]Gian Carlo Cardarilli
Localization of Faults in Radix-n Signed Digit Adders. IOLTS 2006: 178-180 - [c17]Gian Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano:
Concurrent error detection in Reed Solomon decoders. ISCAS 2006 - [c16]Gian Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano:
Fault tolerant design of signed digit based FIR filters. ISCAS 2006 - 2005
- [j2]Gian Carlo Cardarilli
A Comparative Evaluation of Designs for Reliable Memory Systems. J. Electron. Test. 21(4): 429-444 (2005) - [c15]Luca Schiano, Marco Ottavi
On the Analysis of Reed Solomon Coding for Resilience to Transient/Permanent Faults in Highly Reliable Memories. DATE 2005: 580-585 - [c14]Gian Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano:
A Self Checking Reed Solomon Encoder: Design and Analysis. DFT 2005: 111-119 - [c13]Gian Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano:
FPGA oriented design of parity sharing RS codecs. DFT 2005: 259-265 - [c12]Gian Carlo Cardarilli
Design of a Self Checking Reed Solomon Encoder. IOLTS 2005: 201-202 - [c11]Marco Ottavi
Evaluating the Data Integrity of Memory Systems by Configurable Markov Models. ISVLSI 2005: 257-259 - [c10]Marco Ottavi
Design of a QCA Memory with Parallel Read/Serial Write. ISVLSI 2005: 292-294 - 2004
- [c9]Gian Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano:
Data Integrity Evaluations of Reed Solomon Codes for Storage Systems. DFT 2004: 158-164 - [c8]Gian Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano:
A Signed Digit Adder with Error Correction and Graceful Degradation Capabilities. IOLTS 2004: 141-148 - 2003
- [j1]Gian Carlo Cardarilli
Design of a fault tolerant solid state mass memory. IEEE Trans. Reliab. 52(4): 476-491 (2003) - [c7]Gian Carlo Cardarilli, Marco Ottavi
Error Detection in Signed Digit Arithmetic Circuit with Parity Checker. DFT 2003: 401-408 - [c6]Gian Carlo Cardarilli, Marco Ottavi
A fault tolerant hardware based file system manager for solid state mass memory. ISCAS (5) 2003: 649-652 - 2002
- [c5]Gian Carlo Cardarilli, F. Kaddour, A. Leandri, Marco Ottavi
Bit Flip Injection in Processor-Based Architectures: A Case Study. IOLTW 2002: 117- - [c4]Salvatore Pontarelli, Gian Carlo Cardarilli, A. Leandri, Marco Ottavi
A self-checking cell logic block for fault tolerant FPGAs. ISCAS (4) 2002: 477-480 - 2001
- [c3]Marco Ottavi, Gian Carlo Cardarilli, D. Cellitti, Salvatore Pontarelli, Marco Re, Adelio Salsano:
Design of a Totally Self Checking Signature Analysis Checker for Finite State Machines. DFT 2001: 403-411 - [c2]Salvatore Pontarelli, Gian Carlo Cardarilli, A. Malvoni, Marco Ottavi
System-on-Chip Oriented Fault-Tolerant Sequential Systems Implementation Methodology. DFT 2001: 455-460 - [c1]Marco Ottavi
Development of a dynamic routing system for a fault tolerant solid state mass memory. ISCAS (4) 2001: 830-833
Coauthor Index
[c81] [j61] [j60] [j57] [j56] [j55] [j53] [c77] [j52] [j51] [j50] [j49] [c74] [c71] [j47] [j45] [j41] [j40] [c69] [c67] [c64] [j36] [c63] [c60] [i10] [j35] [j34] [i7] [i6] [j32] [j31] [j30] [j28] [c50] [j27] [j26] [j25] [j24] [j23] [c49] [c46] [j22] [j21] [j20] [j18] [j17] [j15] [j13] [j12] [j11] [j10]
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last updated on 2024-10-07 21:25 CEST by the dblp team
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