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Karthik Chandrasekar 0001

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affiliation: TU Delft

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2010 – 2019

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2016
[j3]
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Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens:
Power/Performance Trade-Offs in Real-Time SDRAM Command Scheduling. IEEE Trans. Computers 65(6): 1882-1895 (2016)
2014
[c9]
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Karthik Chandrasekar, Sven Goossens, Christian Weis, Martijn Koedam, Benny Akesson, Norbert Wehn, Kees Goossens:
Exploiting expendable process-margins in DRAMs for run-time performance optimization. DATE 2014: 1-6
2013
[j2]
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Kees Goossens, Arnaldo Azevedo, Karthik Chandrasekar, Manil Dev Gomony, Sven Goossens, Martijn Koedam, Yonghui Li, Davit Mirzoyan, Anca Mariana Molnos, Ashkan Beyranvand Nejad, Andrew Nelson, Shubhendu Sinha:
Virtual execution platforms for mixed-time-criticality systems: the CompSOC architecture and design flow. SIGBED Rev. 10(3): 23-34 (2013)
[c8]
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Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens:
Towards variation-aware system-level power estimation of DRAMs: an empirical approach. DAC 2013: 23:1-23:8
[c7]
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Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens:
System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs. DATE 2013: 236-241
[c6]
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Matthias Jung, Christian Weis, Norbert Wehn, Karthik Chandrasekar:
TLM modelling of 3D stacked wide I/O DRAM subsystems: a virtual platform for memory controller design space exploration. RAPIDO 2013: 5:1-5:6
2012
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Karthik Chandrasekar, Benny Akesson, Kees Goossens:
Run-time power-down strategies for real-time SDRAM memory controllers. DAC 2012: 988-993
[c4]
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  - conf/dsd/ThomasCAJG12
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Gervin Thomas, Karthik Chandrasekar, Benny Akesson, Ben H. H. Juurlink, Kees Goossens:
A Predictor-Based Power-Saving Policy for DRAM Memories. DSD 2012: 882-889
2011
[c3]
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Karthik Chandrasekar, Benny Akesson, Kees Goossens:
Improved Power Modeling of DDR SDRAMs. DSD 2011: 99-108

2000 – 2009

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2008
[c2]
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Nagarajan Venkateswaran, Karthik Chandrasekar, Shrikanth Ganapathy:
Design for Testability of Functional Cores in High Performance Node Architectures. DELTA 2008: 302-307
[c1]
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Nagarajan Venkateswaran, Vinoth Krishnan Elangovan, Karthik Ganesan, T. R. S. Sagar, S. Aananthakrishanan, S. Ramalingam, Shyamsundar Gopalakrishnan, Madhavan Manivannan, Deepak Srinivasan, Viswanath Krishnamurthy, Karthik Chandrasekar, Viswanath Venkatesan, Balaji Subramaniam, V. Sangkar, Aravind Vasudevan, Shrikanth Ganapathy, Sriram Murali, M. Thyagarajan:
On the concept of simultaneous execution of multiple applications on hierarchically based cluster and the silicon operating system. IPDPS 2008: 1-8
2007
[j1]
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Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Karthik Chandrasekar, Prem Kumar Ramesh, Viswanath Venkatesan, Arvindakshan Babu, Sudharshan:
Future generation supercomputers I: a paradigm for node architecture. SIGARCH Comput. Archit. News 35(5): 49-60 (2007)

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