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Cunlu Li
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2020 – today
- 2024
- [j10]Shaocong Wang, Xiaoyun Zhang, Changhong Wang, Ke Wu, Cunlu Li, Dezun Dong:
DRLAR: A deep reinforcement learning-based adaptive routing framework for network-on-chips. Comput. Networks 246: 110419 (2024) - [j9]Xiaoyun Zhang
, Dezun Dong
A survey of machine learning for Network-on-Chips. J. Parallel Distributed Comput. 186: 104778 (2024) - [c20]Peng Xun
Xraytest: An X-ray Test system for finding faults of RDMA-NIC Design and Implementation. NAIC 2024: 7-8 - 2023
- [j8]Chenglong Li
A Deterministic Embedded End-System Tightly Coupled With TSN Schedule. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3707-3719 (2023) - [c19]Xiaoyun Zhang, Yaohua Wang, Dezun Dong, Cunlu Li, Shaocong Wang, Liquan Xiao:
DeTAR: A Decision Tree-Based Adaptive Routing in Networks-on-Chip. Euro-Par 2023: 352-366 - [c18]Chenglong Li
Poster Abstract: A Network-on-Chip Router Architecture for Industrial Internet-of-Thing Gateways. IPSN 2023: 302-303 - [c17]Shaocong Wang, Xiaoyun Zhang, Dezun Dong, Cunlu Li, Zicong Wang, Zongmao Zhang:
LARE: A Linear Approximate Reinforcement Learning Based Adaptive Routing for Network-on-Chips. ISCAS 2023: 1-5 - 2022
- [j7]Ke Wu
Revisiting network congestion avoidance through adaptive packet-chaining reservation. Comput. Networks 212: 109008 (2022) - [j6]Cunlu Li
MUA-Router: Maximizing the Utility-of-Allocation for On-chip Pipelining Routers. ACM Trans. Archit. Code Optim. 19(3): 33:1-33:23 (2022) - [j5]Cunlu Li
Hybrid Memory Buffer Microarchitecture for High-Radix Routers. IEEE Trans. Computers 71(11): 2888-2902 (2022) - [c16]Yunyang Xu, Ke Wu, Dezun Dong, Cunlu Li, Liquan Xiao:
THperf: Enabling Accurate Network Latency Measurement for Tianhe-2 System. HPCC/DSS/SmartCity/DependSys 2022: 1554-1561 - 2021
- [j4]Cunlu Li, Dezun Dong, Shazhou Yang, Xiangke Liao, Guangyu Sun, Yongheng Liu:
CIB-HIER: Centralized Input Buffer Design in Hierarchical High-radix Routers. ACM Trans. Archit. Code Optim. 18(4): 50:1-50:21 (2021) - [c15]Junchao Ma, Dezun Dong, Cunlu Li, Ke Wu, Liquan Xiao:
PAARD: Proximity-Aware All-Reduce Communication for Dragonfly Networks. ISPA/BDCloud/SocialCom/SustainCom 2021: 255-262 - [c14]Junchao Ma, Dezun Dong, Cunlu Li, Ke Wu, Liquan Xiao:
Evaluation of Topology-Aware All-Reduce Algorithm for Dragonfly Networks. NPC 2021: 243-255 - 2020
- [j3]Kang Jin
DancerFly: An Order-Aware Network-on-Chip Router On-the-Fly Mitigating Multi-path Packet Reordering. Int. J. Parallel Program. 48(4): 730-749 (2020) - [c13]Canwen Xiao, Hui Lou, Cunlu Li, Kang Jin
DBM: A Dimension-Bubble-Based Multicast Routing Algorithm for 2D Mesh Network-on-Chips. ACA 2020: 43-55 - [e1]Dezun Dong, Xiaoli Gong, Cunlu Li, Dongsheng Li, Junjie Wu:
Advanced Computer Architecture - 13th Conference, ACA 2020, Kunming, China, August 13-15, 2020, Proceedings. Communications in Computer and Information Science 1256, Springer 2020, ISBN 978-981-15-8134-2 [contents]
2010 – 2019
- 2019
- [j2]Kang Jin
HARE: History-Aware Adaptive Routing Algorithm for Endpoint Congestion in Networks-on-Chip. Int. J. Parallel Program. 47(3): 433-450 (2019) - [c12]Ke Wu, Dezun Dong, Cunlu Li, Shan Huang
Network Congestion Avoidance through Packet-chaining Reservation. ICPP 2019: 58:1-58:10 - [c11]Cunlu Li, Dezun Dong, Xiangke Liao, John Kim
DeepHiR: improving high-radix router throughput with deep hybrid memory buffer microarchitecture. ICS 2019: 403-413 - 2018
- [j1]Cunlu Li
RoB-Router : A Reorder Buffer Enabled Low Latency Network-on-Chip Router. IEEE Trans. Parallel Distributed Syst. 29(9): 2090-2104 (2018) - [c10]Cunlu Li, Dezun Dong, Xiangke Liao:
Eca-Router : On Achieving Endpoint Congestion Aware Switch Allocation in the On-Chip Network. ICCD 2018: 506-509 - [c9]Tianye Yang, Dezun Dong, Cunlu Li, Liquan Xiao:
BFRP: Endpoint Congestion Avoidance Through Bilateral Flow Reservation. IPCCC 2018: 1-8 - [c8]Tianye Yang, Dezun Dong, Cunlu Li, Liquan Xiao:
CRSP: Network Congestion Control through Credit Reservation. ISPA/IUCC/BDCloud/SocialCom/SustainCom 2018: 692-699 - 2017
- [c7]Cunlu Li, Dezun Dong, Xiangke Liao:
Exploiting contention and congestion aware switch allocation in network-on-chips. ACM TUR-C 2017: 41:1-41:10 - 2016
- [c6]Wenxiang Yang, Dezun Dong, Jingyue Zhao
MBL: A Multi-stage Bufferless High-radix Router. CLUSTER 2016: 532-533 - [c5]Cunlu Li, Dezun Dong, Xiangke Liao, Ji Wu, Fei Lei:
RoB-Router: Low Latency Network-on-Chip Router Microarchitecture Using Reorder Buffer. Hot Interconnects 2016: 68-75 - [c4]Cunlu Li, Dezun Dong, Xiangke Liao, Fei Lei, Ji Wu:
CCAS: Contention and congestion aware switch allocation for network-on-chips. ICCD 2016: 444-447 - [c3]Peng Xun, Peidong Zhu, Cunlu Li, Haoyang Zhu:
Discovering Multi-type Correlated Events with Time Series for Exception Detection of Complex Systems. ICDM Workshops 2016: 21-28 - [c2]Fei Lei, Dezun Dong, Xiangke Liao, Xing Su, Cunlu Li:
Galaxyfly: A Novel Family of Flexible-Radix Low-Diameter Topologies for Large-Scales Interconnection Networks. ICS 2016: 24:1-24:12 - 2015
- [c1]Ji Wu, Xiangke Liao, Dezun Dong, Wang Li, Cunlu Li:
HVCRouter: Energy Efficient Network-on-Chip Router with Heterogeneous Virtual Channels. ICA3PP (1) 2015: 199-213
Coauthor Index
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