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Zhewen Yu
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2020 – today
- 2024
- [j1]Yiqi Liu
, Zhewen Yu
Cascading Time-Frequency Transformer and Spatio-Temporal Graph Attention Network for Rotating Machinery Fault Diagnosis. IEEE Trans. Instrum. Meas. 73: 1-10 (2024) - [c13]Zhewen Yu, Christos-Savvas Bouganis:
Auto WS: Automate Weights Streaming in Layer-Wise Pipelined DNN Accelerators. DATE 2024: 1-6 - [c12]Petros Toupas, Zhewen Yu, Christos-Savvas Bouganis, Dimitrios Tzovaras:
SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip Eviction. FCCM 2024: 185-196 - [c11]Zhewen Yu, Sudarshan Sreeram, Krish Agrawal, Junyi Wu, Alexander Montgomerie-Corcoran, Cheng Zhang, Jianyi Cheng, Christos-Savvas Bouganis, Yiren Zhao:
HASS: Hardware-Aware Sparsity Search for Dataflow DNN Accelerator. FPL 2024: 257-263 - [c10]Zhewen Yu
Prediction of Subharmonic Oscillation in SIMO DC-DC Converter with Ordered Power Distributive Control in CCM and Peak Current Mode. ISCAS 2024: 1-5 - [i10]Petros Toupas
SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip Eviction. CoRR abs/2403.18921 (2024) - [i9]Zhewen Yu, Sudarshan Sreeram
HASS: Hardware-Aware Sparsity Search for Dataflow DNN Accelerator. CoRR abs/2406.03088 (2024) - [i8]Hongzhe Huang, Zhewen Yu, Jiang Liu, Li Cai, Dian Jiao, Wenqiao Zhang, Siliang Tang, Juncheng Li, Hao Jiang, Haoyuan Li, Yueting Zhuang:
Align2LLaVA: Cascaded Human and Large Language Model Preference Alignment for Multi-modal Instruction Curation. CoRR abs/2409.18541 (2024) - 2023
- [c9]Zhewen Yu, Christos-Savvas Bouganis:
Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor Decomposition. FPL 2023: 204-211 - [c8]Alexander Montgomerie-Corcoran, Zhewen Yu, Jianyi Cheng, Christos-Savvas Bouganis:
PASS: Exploiting Post-Activation Sparsity in Streaming Architectures for CNN Acceleration. FPL 2023: 288-293 - [c7]Alexander Montgomerie-Corcoran, Petros Toupas
SATAY: A Streaming Architecture Toolflow for Accelerating YOLO Models on FPGA Devices. ICFPT 2023: 179-187 - [c6]Zhewen Yu, Christos-Savvas Bouganis:
SVD-NAS: Coupling Low-Rank Approximation and Neural Architecture Search. WACV 2023: 1503-1512 - [i7]Zhewen Yu, Christos-Savvas Bouganis:
Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor Decomposition. CoRR abs/2306.05021 (2023) - [i6]Alexander Montgomerie-Corcoran, Zhewen Yu, Jianyi Cheng, Christos-Savvas Bouganis:
PASS: Exploiting Post-Activation Sparsity in Streaming Architectures for CNN Acceleration. CoRR abs/2307.07821 (2023) - [i5]Jianyi Cheng, Cheng Zhang, Zhewen Yu, Alexander Montgomerie-Corcoran, Can Xiao, Christos-Savvas Bouganis, Yiren Zhao:
Fast Prototyping Next-Generation Accelerators for New ML Models using MASE: ML Accelerator System Exploration. CoRR abs/2307.15517 (2023) - [i4]Alexander Montgomerie-Corcoran, Petros Toupas
SATAY: A Streaming Architecture Toolflow for Accelerating YOLO Models on FPGA Devices. CoRR abs/2309.01587 (2023) - [i3]Zhewen Yu, Christos-Savvas Bouganis:
AutoWS: Automate Weights Streaming in Layer-wise Pipelined DNN Accelerators. CoRR abs/2311.04764 (2023) - 2022
- [c5]Alexander Montgomerie-Corcoran
SAMO: Optimised Mapping of Convolutional Neural Networks to Streaming Architectures. FPL 2022: 418-424 - [c4]Zhewen Yu, Jin Wang, Liang-Chih Yu, Xuejie Zhang:
Dual-Encoder Transformers with Cross-modal Alignment for Multimodal Aspect-based Sentiment Analysis. AACL/IJCNLP (1) 2022: 414-423 - [i2]Zhewen Yu, Christos-Savvas Bouganis:
SVD-NAS: Coupling Low-Rank Approximation and Neural Architecture Search. CoRR abs/2208.10404 (2022) - 2021
- [c3]Zhewen Yu, Christos-Savvas Bouganis:
StreamSVD: Low-rank Approximation and Streaming Accelerator Co-design. FPT 2021: 1-9 - [c2]Zhewen Yu, Jin Wang, Xuejie Zhang:
YNU-HPCC at SemEval-2021 Task 10: Using a Transformer-based Source-Free Domain Adaptation Model for Semantic Processing. SemEval@ACL/IJCNLP 2021: 1289-1294 - [i1]Alexander Montgomerie-Corcoran, Zhewen Yu, Christos-Savvas Bouganis:
SAMO: Optimised Mapping of Convolutional Neural Networks to Streaming Architectures. CoRR abs/2112.00170 (2021) - 2020
- [c1]Zhewen Yu, Christos-Savvas Bouganis
A Parameterisable FPGA-Tailored Architecture for YOLOv3-Tiny. ARC 2020: 330-344
Coauthor Index
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