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MLCAD 2023: Snowbird, UT, USA
- 5th ACM/IEEE Workshop on Machine Learning for CAD, MLCAD 2023, Snowbird, UT, USA, September 10-13, 2023. IEEE 2023, ISBN 979-8-3503-0955-3
- Zhi-Hong Lee, Chen-Han Lu, Hsin-Hung Pan, Ting-Chi Wang, Po-Yuan Chen, Cindy Chin-Fang Shen:
A Robust Routing Guide Generation Approach for Mixed-Size Designs. 1-6 - Norman Chang:
ML-augmented Simulation and Co-optimization for Semiconductor Applications and Design WorkflowsBeyond. 1 - Youngsoo Shin:
AI-EDA: Toward a Holistic Approach to AI-Powered EDA. 1-3 - Wei Li, Ruben Purdy, José M. F. Moura, R. D. Shawn Blanton:
Characterize the ability of GNNs in attacking logic locking. 1-6 - Bhuvnesh Kumar, Ganapathy Parthasarathy
, Saurav Nanda, Sridhar Rajakumar:
Optimizing Constrained Random Verification with ML and Bayesian Estimation. 1-6 - Bei Yu:
Machine Learning in EDA: When and How. 1-6 - Yishuang Lin, Yaguang Li, Meghna Madhusudan, Sachin S. Sapatnekar, Ramesh Harjani, Jiang Hu:
MMM: Machine Learning-Based Macro-Modeling for Linear Analog ICs and ADC/DACs. 1-6 - Georges G. E. Gielen:
Analog synthesis 3.0: AI/ML to synthesize and test analog ICs: hope or hype ? 1 - Yannick Uhlmann, Till Moldenhauer
Differentiable Neural Network Surrogate Models for gm/ID-based Analog IC Sizing Optimization. 1-6 - Chuck Alpert:
Beyond Hyperparameter Optimization: Using AI to address Digital Implementation Challenges. 1 - Fin Amin, Soumyadeep Chatterjee, Paul D. Franzon:
DepthGraphNet: Circuit Graph Isomorphism Detection via Siamese-Graph Neural Networks. 1-6 - Yikang Ouyang, Sicheng Li, Dongsheng Zuo, Hanwei Fan, Yuzhe Ma:
ASAP: Accurate Synthesis Analysis and Prediction with Multi-Task Learning. 1-6 - Wonjae Lee, Insu Cho, Gangmin Cho, Youngsoo Shin:
Routability-Driven Power Distribution Network Synthesis with IR-Drop Budgeting. 1-6 - Ivo Bolsens:
Bridging Divides: Unifying AI Architectures from from Edge to Cloud. 1 - Zhuolun He, Haoyuan Wu, Xinyun Zhang, Xufeng Yao, Su Zheng, Haisheng Zheng, Bei Yu:
ChatEDA: A Large Language Model Powered Autonomous Agent for EDA. 1-6 - Daniela Sanchez Lopera
Using Graph Neural Networks for Timing Estimations of RTL Intermediate Representations. 1-6 - Yoonsang Song, Gangmin Cho, Wonjae Lee, Youngsoo Shin:
Simultaneous Clock Wire Sizing and Shield Insertion for Minimizing Routing Blockage. 1-6 - Animesh Basak Chowdhury, Jitendra Bhandari, Luca Collini, Ramesh Karri, Benjamin Tan, Siddharth Garg:
ConVERTS: Contrastively Learning Structurally InVariant Netlist Representations. 1-6 - Ismail Bustany, Grigor Gasparyan, Amit Gupta, Andrew B. Kahng, Meghraj Kalase, Wuxi Li, Bodhisatta Pramanik
The 2023 MLCAD FPGA Macro Placement Benchmark Design Suite and Contest Results. 1-6 - Zhengfeng Wu, Isabel Song, Ioannis Savidis:
Hybrid Utilization of Subgraph Isomorphism and Relational Graph Convolutional Networks for Analog Functional Grouping Annotation. 1-6 - Michael Kazda, Michael D. Monkowski, George Antony:
APEX: Recommending Design Flow Parameters Using a Variational Autoencoder. 1-6 - Jason Blocklove, Siddharth Garg, Ramesh Karri, Hammond Pearce
Chip-Chat: Challenges and Opportunities in Conversational Hardware Design. 1-6 - Guangyu Hu
NeuroPDR: Integrating Neural Networks in the PDR Algorithm for Hardware Model Checking. 1-6 - Jaeseung Lee
Machine Learning-based Fast Circuit Simulation for Analog Circuit Array. 1-6 - Prianka Sengupta, Aakash Tyagi, Yiran Chen, Jiang Hu:
Early Identification of Timing Critical RTL Components using ML based Path Delay Prediction. 1-6 - Rodion Novkin, Simon Thomann, Hussam Amrouch:
ML-TCAD: Perspectives and Challenges on Accelerating Transistor Modeling using ML. 1-4
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