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ECCTD 2007: Seville, Spain
- 18th European Conference on Circuit Theory and Design, ECCTD 2007, Seville, Spain, August 26-30, 2007. IEEE 2007, ISBN 978-1-4244-1341-6
- Chutham Sawigun
, Jirayuth Mahattanakul, Andreas Demosthenous, Dipankar Pal:
A low-power CMOS analog voltage buffer using compact adaptive biasing. 1-4 - Jose Maria Garcia del Pozo
3.125 Gb/s temperature compensated CMOS optical preamplifier with automatic gain control. 5-8 - Juan Pablo Alegre, Santiago Celma, Belén Calvo, Aránzazu Otín
Low-voltage low-power 200MHz variable gain amplifier in CMOS 0.35μm. 9-12 - Giuseppe Di Cataldo, Alfio Dario Grasso
CMOS voltage feedback current amplifier. 13-15 - Xian Li, Changyuan Chang, Juan Li:
A rail-to-rail op amp for VLSI cell with constant performance. 16-19 - Georges G. E. Gielen
Automated synthesis of complex analog circuits. 20-23 - Delia Rodríguez de Llera Gonzalez, Ana Rusu
EDA for RF and analog front-ends in the 4G era: Challenges and solutions. 24-27 - Helmut Graeb, Daniel Mueller
Pareto optimization of analog circuits considering variability. 28-31 - Manuel F. M. Barros
An evolutionary optimization kernel using a dynamic GA-SVM model applied to analog IC design. 32-35 - Ender Yilmaz, Günhan Dündar
New layout generator for analog CMOS circuits. 36-39 - Juan M. Carrillo
CMOS continuous-time CMFB circuit with improved linearity. 40-43 - Carlos Muñiz-Montero
A very compact KHN filter with multidecade tuning. 44-47 - Min Xu, Esther Rodríguez-Villegas:
A 1V low power sigma-delta modulator based on floating gate MOS transistors. 48-51 - Jaime Ramírez-Angulo, Antonio Lopez-Martin
Class AB fully differential voltage followers. 52-55 - Antonio J. López-Martín
Low-voltage FGMOS-based balanced current scaling in moderate inversion. 56-59 - Thomas Stucke, Rainer Kokozinski
Technology-caused performance limitation of the common-gate LNA. 60-63 - Jouni Kaukovuori
Analysis and design of common-gate low-noise amplifier for wideband applications. 64-67 - Mikko Kaltiokallio, Jouni Kaukovuori, Jussi Ryynänen
Analysis of different feedback topologies to LNA input matching. 68-71 - Davide Brandano, Manuel Delgado-Restituto
A 5.3mW, 2.4GHz ESD protected Low-Noise Amplifier in a 0.13μm RFCMOS technology. 72-75 - Sherif Ahmed Saleh Mohamed, Maurits Ortmanns, Yiannos Manoli:
A comparative study of CMOS LNAs. 76-79 - Jorge Fernández-Berni
Practical limitations to the implementation of resistive grid filtering in Cellular Neural Networks. 80-83 - Alexey Lopich, Piotr Dudek:
Implementation of an asynchronous cellular logic network as a co-processor for a general-purpose massively parallel array. 84-87 - Natalia A. Fernandez-Garcia, Jordi Albo-Canals, Víctor M. Brea
Verification of Split&Shift techniques for CNN hardware reduction. 88-91 - Víctor M. Brea
Relating Cellular Non-linear Networks to Threshold Logic and Single Instruction Multiple Data computing models. 92-95 - Lasse Aaltonen, Pasi Rahikkala, Mikko Saukoski, Kari Halonen:
High resolution analog interface for micromachined capacitive accelerometer. 96-99 - Anna Arbat, Joan Canals
Design and control of a micro-cantilever tool for micro-robot contact sensing. 100-103 - Matti Paavola, Mikko Saukoski, Mika Laiho
A nanopower double-mode 1-V frequency reference for an ultra-low-power capacitive sensor interface. 104-107 - Paolo Bruschi
A low power capacitance to pulse width converter for integrated sensors. 108-111 - Syed Arsalan Jawed, Davide Cattin, Nicola Massari, Massimo Gottardi, Benno Margesin, Andrea Baschirotto
A simplified modeling approach for a MEMS capacitive sensor. 112-115 - Gianluca Giustolisi, Gaetano Palumbo, Ester Spitale:
LDO compensation strategy based on current buffer/amplifiers. 116-119 - Socheat Heng, Cong-Kha Pham
Compensated circuit for Low Dropout Regulator having stable load regulation after consideration of bonding wire resistance. 120-123 - José L. Ausín
A programmable switched-capacitor relaxation oscillator with low phase jitter. 124-127 - Nobukazu Takai, Yukihiro Fujimura:
Compensation method of amplitude error in sawtooth wave generator. 128-131 - Artur Silva
Design of a multimode reconfigurable sigma-delta converter for 4G wireless receivers. 132-135 - Alonso Morgado
Novel topologies of cascade ΣΔ modulators for low-voltage wideband applications. 136-139 - Song-Bok Kim, Stefan Joeres, Stefan Heinen:
A compensation method of the excess loop delay in continuous-time complex sigma-delta modulators. 140-143 - Mohammad Yavari
Accurate and simple modeling of amplifier dc gain nonlinearity in switched-capacitor circuits. 144-147 - Erik Backenius, Mark Vesterbacka, V. B. Settu:
Reduction of simultaneous switching noise in analog signal band. 148-151 - Dennis Andrade, Ferran Martorell, Marc Pons
Power supply noise and logic error probability. 152-155 - Javier Castro-Ramirez, Pilar Parra Fernández
A switching noise vision of the optimization techniques for low-power synthesis. 156-159 - Giorgio Boselli, Gabriella Trucco
Effects of digital switching noise on analog circuits performance. 160-163 - Naveed Ahsan, Aziz Ouacha, Carl Samuelsson, Tomas Boman:
Applications of Programmable Microwave Function Array (PROMFA). 164-167 - Stefan Back Andersson, Rashad Ramzan, Jerzy J. Dabrowski, Christer Svensson:
Multiband direct RF-sampling receiver front-end for WLAN in 0.13 μm CMOS. 168-171 - Ana Rusu
Flexible ADCs for wireless mobile radios. 172-175 - Hsiao Wei Su, Yi Ke Cui, Bao Yong Chi, Zhi Hua Wang:
A RF front-end for digital audio broadcasting. 176-179 - Ümit Güz, Hakan Gürkan
A new algorithm for high speed speech and audio coding. 180-183 - Akio Miyazaki:
A study on the best wavelet filter bank problem in the wavelet-based image watermarking. 184-187 - Shuitsu Matsumura, Takuji Maezawa, Daisuke Takago, Kyoko Kato, Tsuyoshi Takebe:
Least-square-based block adaptive prediction approach for lossless image coding. 188-191 - Phuoc Vo Tan, Gilles Millerioux, Jamal Daafouz:
A comparison between the message embedded cryptosystem and the self-synchronous stream cipher Mosquito. 192-195 - Hwang-Cherng Chow, Yi-Hung Chen:
1V 10-bit successive approximation ADC for low power biomedical applications. 196-199 - Nicolás Medrano, Maria Teresa Sanz
An adaptive circuit for low-power sensor processing: Mismatch effects. 200-203 - Xiao Liu, Andreas Demosthenous, Mohamad Rahal, Nick Donaldson
Recent advances in the design of implantable stimulator output stages. 204-207 - Hongwei Hong, Mohamad Rahal, Andreas Demosthenous, Richard H. Bayford:
Floating voltage-controlled current sources for electrical impedance tomography. 208-211 - Gaetano Palumbo, Melita Pennisi, Salvatore Pennisi
Distortion analysis in the frequency domain of a Gm-C biquad. 212-215 - Pieter Crombez, Jan Craninckx
Linearity guidelines for gm-C biquad filter design using architecture optimization with Volterra analysis. 216-219 - Tomas Sutory, Zdenek Kolka, Dalibor Biolek
Nonlinear on-chip capacitor characterization. 220-223 - Giuseppe Di Cataldo, Gaetano Palumbo, Melita Pennisi, Salvatore Pennisi
A generalization of Miller formulae for nonlinear feedback networks. 224-227 - Vesa Turunen, Tero Nieminen, Marko Kosunen, Kari Halonen:
12-bit 2.4 GHz D/A upconverter. 228-231 - Danping Li, Liter Siek
A two-step dynamic reference A/D converter. 232-235 - Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Analog calibration of channel mismatches in time-interleaved ADCs. 236-239 - Erik Säll, Mark Vesterbacka:
Thermometer-to-binary decoders for flash analog-to-digital converters. 240-243 - Mattias Olsson, Håkan Johansson, Per Löwenborg:
Simultaneous estimation of gain, delay, and offset utilizing the farrow structure. 244-247 - Amir Eghbali, Håkan Johansson, Per Löwenborg:
An arbitrary-bandwidth transmultiplexer and its application to flexible frequency-band reallocation networks. 248-251 - Levent Aksoy
Minimum number of operations under a general number representation for digital filter synthesis. 252-255 - A. Perez-Pascual, T. Sansaloni, Vicente Torres
Design of an efficient digital down-converter for a SDR-based DVB-S receiver. 256-259 - Maja Vidojkovic, Mihai Sanduleanu
A broadband, inductorless LNA for multi-standard aplications. 260-263 - B. Siddik Yarman
Gain-Bandwidth Limitations of 0.18μm Si-CMOS RF technology. 264-267 - Nicodimus Retdian, Shigetaka Takagi, Nobuo Fujii:
Design optimization of staggered amplifier for wide-band applications. 268-271 - Enrico F. Calandra, Bruno Di Maio, Daniele Lupo:
On the optimal design of multi-stage cascaded transistor amplifiers with noise, gain and mismatch constraints. 272-275 - Zoltán Nagy, László Kék, Zoltán Kincses, Péter Szolgay:
CNN model on cell multiprocessor array. 276-279 - Ertugrul Saatci
An FPGA implementation Of 2-D CNN gabor-type filter. 280-283 - Péter Sonkoly, István Noé, José M. Carcione
CNN-UM based transversely isotropic elastic wave propagation simulation. 284-287 - Sándor Kocsárdi, Zoltán Nagy, Péter Szolgay:
Emulated digital CNN solution for two dimensional compressible flows. 288-291 - Fernando Corinto
Design of bio-inspired network models for spatio-temporal pattern identification. 292-295 - Christian Niederhöfer, Frank Gollas, Ronald Tetzlaff:
Dynamics of EEG-signals in epilepsy: Spatio temporal analysis by Cellular Nonlinear Networks. 296-299 - J. Salzmann, Jean Laurent Guyomard, Pontus Linderholm, Bogdan Kolomiets, Harsha Kasi, Michel Pâques, M. Simonutti, E. Dubus, S. Rosolen, José-Alain Sahel, Philippe Renaud, Avinoam B. Safran, Serge Picaud
Retinal prosthesis : Testing prototypes on a dystrophic rat retina. 300-303 - Paolo Arena, Sebastiano De Fiore, Luigi Fortuna, L. Nicolosi, Luca Patané
Visual homing: Experimental results on an autonomous robot. 304-307 - Arthur H. M. van Roermund:
Smart, flexible, and future-proof data converters. 308-319 - Christian C. Enz, Jacek Baborowski, Jérémie Chabloz, Martin Kucera, Claude Müller, David Ruffieux, Nicola Scolari:
Ultra low-power MEMS-based radio for wireless sensor networks. 320-331 - Jaime Ramírez-Angulo, Belén Calvo, Sri Raga Sudha Garimella, Santiago Celma, Maria Teresa Sanz
New highly-accurate CMOS source-degenerated based V-I converter with positive feedback. 332-335 - Aránzazu Otín
Continuous-time filter featuring Q and frequency on-chip automatic tuning. 336-339 - Xi Zhu, Yichuang Sun, James Moritz:
A CMOS fifth-order 400MHz current-mode LF linear phase filter for hard disk read channels. 340-343 - Richard Stary, Pravoslav Martínek:
Design optimization of wave active filters. 344-347 - Ruida Yun, Yajie Qin, Svante Signell:
LMS-based calibration of pipelined ADCs including linear and nonlinear errors. 348-351 - Michael Soudan, Ronan Farrell
Methodology for mismatch reduction in time-interleaved ADCs. 352-355 - Dongjin Lee, Jaewon Song, Jongha Shin, Sanghoon Hwang, Minkyu Song, Tad Wysocki:
Design of a 1.8V 8-bit 500MSPS folding-interpolation CMOS A/D converter with a folder averaging technique. 356-359 - Athanasios Stefanou, Georges G. E. Gielen
Analyzing the performance degradation of flash A/D converters due to substrate noise coupling. 360-363 - Paris Kitsos
A high-speed hardware implementation of the Hermes8-128 stream cipher. 364-367 - Massimo Alioto, Massimo Poli, Santina Rocchi
A General Model of DPA Attacks to Precharged Busses in Symmetric-Key Cryptographic Algorithms. 368-371 - Peter Nilsson:
Arithmetic and architectural design to reduce leakage in nano-scale digital circuits. 372-375 - Omer Can Akgun
Current sensing completion detection for subthreshold asynchronous circuits. 376-379 - Hervé Barthélemy, Sylvain Bourdel, Jean Gaubert, Stéphane Meillére:
OOK/NCP-FSK Modulator based on Coupled Open-Closed-Loop VCOs. 380-383 - Haizheng Guo, Innes Cathcart, Robert Sobot:
T1/E1/J1 receiver in CMOS. 384-387 - Henri Harju, Timo Rautio
Envelope tracking power amplifier with static predistortion linearization. 388-391 - Prasanna Kannan:
Fundamental blocks of single ended LVCMOS output buffer- a circuit level design guideline. 392-395 - Ruxandra-Liana Costea, Corneliu A. Marinov:
Clocking and WTA design of a continuous time Hopfield net with parasitic capacitances. 396-399 - Takenobu Matsuura, Shuhei Iwanaga, Kaset Sirisantisamrid, Kitti Tirasesth:
A Realization of FIR System Characterizing Outline of Fingers and Its Application to Person Identification. 400-403 - Zhibin Pan, Koji Kotani, Tadahiro Ohmi:
Improved fast encoding method of vector quantization based on dynamic element reordering for codewords. 404-407 - Akio Miyazaki:
Improvement of watermark detection process based on Bayesian estimation. 408-411 - Toivo Paavle, Paul Annus
Bioimpedance monitoring with improved accuracy using three-level stimulus. 412-415 - Hideaki Sakai:
Analysis of an adaptive algorithm for feedback cancellation in hearing aids for sinusoidal signals. 416-419 - Hakan Gürkan
EEG signal compression based on Classified Signature and Envelope Vector Sets. 420-423 - Giovanni Costantini, Massimo Carota, Giovanni Maccioni, Daniele Giansanti:
Discrimination Between Human Functional Ability/Disability by means of Different Classification Methodologies. 424-427 - Fethi Gür, Fuat Anday:
First-order allpass sections-based high-input low output impedance voltage-mode universal filter using FDCCIIs. 428-431 - Pravoslav Martínek, Dasa Ticha:
SI-biquad based on direct-form digital filters. 432-435 - Phanumas Khumsat, Apisak Worapishet:
Single-stage CMOS OTA for active-RC filter design. 436-439 - Giuseppe Ferri
CCII-based high-valued inductance simulators with minumum number of active elements. 440-443 - B. Bechen, Ton J. J. van den Boom, Dirk Weiler, Bedrich J. Hosticka:
Theoretical and practical minimum of the power Consumption of 3 ADCs in SC technique. 444-447 - Ufuk Yapar, Günhan Dündar
Current-mode circuits for sigma-delta converters. 448-451 - Jesús Ruiz-Amaya, Juan Francisco Fernández-Bootello, Manuel Delgado-Restituto
Design procedure for optimizing the power consumption of two-stage Miller compensated amplifiers in SC circuits. 452-455 - Francesco Centurelli
A Sample-and-Hold Circuit with Very Low Gain Error for Time Interleaving Applications. 456-459 - Danny Crookes, Richard M. Jiang
A Low-Power High-Radix Serial-Parallel Multiplier. 460-463 - Nicola Petra
Design of fixed-width multipliers with minimum mean square error. 464-467 - Nicola Petra
High Speed Galois Fields GF(2m) Multipliers. 468-471 - Shamim Akhter:
VHDL implementation of fast NxN multiplier based on vedic mathematic. 472-475 - Yi-Ran Sun, Svante Signell:
Implementation of generalized uniform Bandpass Sampling with complex FIR and IIR Filtering. 476-479 - C. Nsiala Nzeza, Jean Gorisse, Antoine Frappé
Reconfigurable digital Delta-Sigma Modulator Synthesis for digital wireless transmitters. 480-483 - Shunsuke Nakamura, Uichiro Omae, Hiroshi Watanabe, Takao Waho:
A design of multi-GHz continuous-time bandpass filters using 0.1-μm HEMT technology. 484-487 - Pooria Varahram
Power amplifiers linearization based on digital predistortion with memory effects used in CDMA applications. 488-491 - Giovanni Egidio Pazienza, Xavier Vilasís-Cardona, Kristóf Karacs:
An automatic tool to design CNN-UM programs. 492-495 - Norbert Bérci, Péter Szolgay:
Vision based human-machine interface via hand gestures. 496-499 - Giovanni Costantini
A CNN-based Algorithm for Moving Object Detection in Stereovision Applications. 500-503 - Nerhun Yildiz
On the digital simulation of linear cellular neural networks. 504-506 - Cristian Grava
An Adaptive Multi-Resolution Algorithm for Motion Estimation in Medical Image Sequences. 507-510 - Carmen Alonso-Montes
On chip implementation of a pixel-parallel approach for retinal vessel tree extraction. 511-514 - Kristóf Karacs, Tamás Roska:
Locating and reading color displays with the bionic eyeglass. 515-518 - Richard M. Jiang
FPGA Implementation of 3D Discrete Wavelet Transform for Real-Time Medical Imaging. 519-522 - Salvatore di Fazio, Francesco Pulvirenti, Tiziana Signorelli, Christian Lao, Salvatore Pennisi
Low quiescent current high speed amplifier for LCD column driver. 523-526 - Giuseppe Ferri
A rail-to-rail DC-enhanced adaptive biased fully differential OTA. 527-530 - Jaime Ramírez-Angulo, Annajirao Garimella, Lalitha Mohana Kalyani-Garimella, Milind S. Sawant, Antonio Lopez-Martin
Low voltage gain boosting schemes for one stage operational amplifiers. 531-534 - Pietro Monsurrò
Sub-1V CMOS OTA with Body-driven Gain Boosting. 535-538 - Alfio Dario Grasso
CMOS Miller OTA with Body-Biased Output Stage. 539-542 - Árpád Bürmen, Iztok Fajfar, Tadej Tuma:
Combined simplex-trust-region optimization algorithm for automated IC design. 543-546 - Jianhua Li, Laleh Behjat
Clustering algorithms for circuit partitioning and placement problems. 547-550 - Lukas Dolivka, Jirí Hospodka:
Switched-current filter optimization based on evolutionary algorithms. 551-554 - Esteban Tlelo-Cuautle
Designing VFs by applying genetic algorithms from nullator-based descriptions. 555-558 - Lioua Labrak, T. Tixier, Y. Fellah, Nacer Abouchi:
Automated cost function formulation for analog design optimization. 559-562 - Victor Rodolfo Gonzalez-Diaz, Miguel Angel Garcia-Andrade, Guillermo Espinosa Flores-Verdad:
Optimal dithered digital sigma-delta modulators for fractional-N frequency synthesizers. 563-566 - Zhipeng Ye, Wenbin Chen, Michael Peter Kennedy
A novel dual-loop multi-phase frequency synthesizer. 567-570 - Mohammad M. Ghahramani, Saeid Daneshgar, Michael Peter Kennedy
Optimizing the design of an injection-locked frequency divider by means of nonlinear analysis. 571-574 - Carlos E. Christoffersen, Marissa Condon, Tao Xu:
A new method for the determination of the locking range of oscillators. 575-578 - Byungjin Chun, Zheyao Zhang, Sverre Lidholm:
A circular voltage-controlled phase shifter with unlimited phase range for phase tracking loops. 579-582 - Dafu Bai, David G. Haigh:
Derivation of power amplifier predistortion circuits by frequency to signal amplitude transformation. 583-586 - Mikko Talonen, Saska Lindfors:
Split-band supply modulator for OFDM polar transmitter: Filter design. 587-590 - Simo Hietakangas, Timo Rautio
Feedthrough cancellation in a class E amplified polar transmitter. 591-594 - Sandeep Kowlgi Srinivasan, Ana Rusu
Ultra-low power 2.4 GHz CMOS receiver front-end for sensor nodes. 595-598 - Maria Drakaki
Improving the quality factor estimation for differentially driven RF CMOS inductor. 599-602 - Simone Orcioni
A switching mode power supply with digital pulse density modulation control. 603-606 - Herminio Marténez, Alfonso Conesa:
Linear-Assisted Converter with Constant Switching Frequency. 607-610 - Herminio Marténez, Alfonso Conesa:
Modeling of Linear-Assisted DC-DC Converters. 611-614 - Laura Gobbi, Alessandro Cabrini, Guido Torelli:
A discussion on exponential-gain charge pump. 615-618 - Andrea Fantini, Alessandro Cabrini, Guido Torelli:
Impact of control signal skews on self-boosted charge pumps. 619-622 - Marco Bucci, Raimondo Luzzi:
Digital post-processing for testable random bit generators. 623-626 - Fabio Pareschi
Second-level testing revisited and applications to NIST SP800-22. 627-630 - Akio Tsuneda, Sho Mitsuishi, Takahiro Inoue:
A Study on Random Bit Generators with Post-Processing by Shift Registers and Modulo-2 Addition. 631-634 - Riccardo Rovatti
On the convergence to regime of ADC-based true random number generators. 635-638 - Tommaso Addabbo
On the generation of pseudo-random sequences exploiting digitized chaotic systems. 639-642 - Salvatore Omar Cannizzaro, Alfio Dario Grasso
Single Miller capacitor frequency compensation with nulling resistor for three-stage amplifiers. 643-646 - M. Cianella, Christian Falconi, Arnaldo D'Amico, Giuseppe Scotti, Alessandro Trifiletti:
Mismatch Tolerant, Continuous Time, Rail to Rail, Gain Enhanced CMOS Amplifiers. 647-650 - Francesco Centurelli
Power-constrained Bandwidth Optimization in Cascaded Open-loop Amplifiers. 651-654 - Andrea Pugliese, Gregorio Cappuccino
Design methodology of nested-Miller amplifiers for small capacitive loads. 655-658 - Antti Tanskanen
Transmission line modelling using wave equation standing-wave solutions as basis functions. 659-662 - Agnieszka Ligocka, Wojciech Bandurski
A new approach to analysis and simulation of single and coupled low-loss interconnects. 663-666 - Rosario Mita, Gaetano Palumbo:
Highly-accurate propagation delay analytical model of an RC-circuit with a ramp input. 667-670 - Luis R. J. Costa, Keijo Nikoskinen, Martti Valtonen:
Models for the LE-FDTD resistive voltage source spanning multiple cells. 671-674 - Giuseppe Caruso, Alessio Macchiarella:
A design methodology for low-power MCML ring oscillators. 675-678 - Tsubasa Katao, Keita Hayashi, Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa:
Sorter-based sigma-delta domain arithmetic circuits. 679-682 - Keita Hayashi, Tsubasa Katao, Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa:
Piecewise linear circuits operating on first-order multi-level and second-order binary sigma-delta modulated signals. 683-686 - Valeria Garofalo, Ettore Napoli, Nicola Petra
Code compression for ARM7 embedded systems. 687-690 - Georges Kaddoum, Daniel Roviras, Pascal Chargé, Daniele Fournier-Prunaret:
Analytical calculation of BER in communication systems using a piecewise linear chaotic map. 691-694 - Ruey-Wen Liu, Rendong Ying, Guozhi Xu:
The ultimate capacity of MIMO channels and its realization. 695-698 - Rachit Agarwal, Emanuel M. Popovici, Massimiliano Sala
Low cost error recovery in Delay-Intolerant Wireless Sensor Networks. 699-702 - James McDonagh, Massimiliano Sala
Efficient construction and implementation of short LDPC codes for wireless sensor networks. 703-706 - Stephen Ralph, Ronan Farrell
Using high pass sigma-delta modulation for Class-S power amplifiers. 707-710 - Ronan Farrell
An efficient parallel structure for ΣΔ modulators for use in high speed switching power amplifiers. 711-714 - Lázaro Marco, Eduard Alarcón:
Derivation of the sliding domain for a buck-based switching amplifier in wideband signal tracking applications. 715-718 - Elena Tamaseviciute, Skaidra Bumeliene
Using Taylor predictor to improve stabilization of steady state in third-order chaotic system. 719-722 - Martial Coulon, Daniel Roviras:
Multi-user detection for an asynchronous differential chaos-based multiple access system. 723-726 - Zbigniew Galias
Study of discretization of two-dimensional sliding mode control systems. 727-730 - Raymond Flynn, Orla Feely
Limit cycles in Digital Bang-Bang PLLs. 731-734 - Maciej J. Ogorzalek
Nonlinearities: Your worst enemies...? ... Your best friends! 735-738 - Yaohui Kong, Shuzheng Xu, Huazhong Yang:
A highly linear low voltage CMOS triode transconductor. 739-742 - Pietro Monsurrò
Very Low Voltage CMOS Two-stage Amplifier. 743-746 - Merih Yildiz, Shahram Minaei, Izzet Cem Göknar:
A low-power multilevel-output classifier circuit. 747-750 - Chutham Sawigun
A low-voltage, low-power, high-linearity cmos four-quadrant analog multiplier. 751-754 - Paula López
Improved Analytical I-V model for polygonal-shape enclosed layout transistors. 755-758 - Masahiro Fukui, Sayaka Iwakoshi, Tatsuya Koyagi:
An algorithm for battery modeling and life time maximization of small size electric systems. 759-762 - Zlatica Marinkovic
Improved Noise Wave Model of Microwave FETs based on Artificial Neural Networks. 763-766 - Juan Hinojosa
Multiple adaptive neuro-fuzzy inference systems for accurate microwave CAD applications. 767-770 - Massimo Alioto, Gaetano Palumbo, Massimo Poli:
Energy consumption in RLC tree circuits. 771-774 - Akira Tsuzaki, Toshio Unno, Yuichi Tanji, Hideki Asai
A fast transient simulation based on Model Order Reduction and RLCG-MNA formulation. 775-778 - Piotr Bilski:
Automated diagnostic system using graph clustering algorithm and fuzzy logic method. 779-782 - Piotr Zegarmistrz, Zbigniew Galias
On reconstruction of conductances in resistor grids from boundary measurements. 783-786 - José C. García, Juan A. Montiel-Nelson
Efficient CMOS driver-receiver pair with low-swing signaling for on-chip interconnects. 787-790 - Franco Fiori:
Low-power single-ended I/O circuit for binary interchip communications. 791-794 - José C. García, Juan A. Montiel-Nelson
High performance bootstrapped CMOS low to high-swing level-converter for on-chip interconnects. 795-798 - Massimo Alioto, Gaetano Palumbo:
Very high-speed carry computation based on mixed dynamic/transmission-gate Full Adders. 799-802 - Sibel Senan
Global robust stability of bidirectional associative memory neural networks. 803-806 - Burcu Erkmen, Tulay Yildirim
Obtaining decision boundaries of CSFNN neurons using current mode analog circuitry. 807-810 - Yoko Uwate, Yoshifumi Nishio
Scale-rule selection of affordable neural network for chaotic time series learning. 811-814 - Giovanni Egidio Pazienza, Jordi Bellana-Camanes, Jordi Riera-Babures, Xavier Vilasís-Cardona, Marco Antonio Moreno-Armendáriz
Optimized cellular neural network universal machine emulation on FPGA. 815-818 - Paolo Checco, Mario Biey, Marco Righero:
Influence of topology on synchronization in networks of coupled Hindmarsh-Rose neurons. 819-822 - Yuta Komatsu, Yoko Uwate, Yoshifumi Nishio
Clustering phenomenon of chaotic circuits coupled symmetrically by mutual inductors. 823-826 - Daisuke Atuti, Naoto Kato, Kazuki Nakada, Takashi Morie:
CMOS circuit implementation of a coupled phase oscillator system using pulse modulation approach. 827-830 - Seiichiro Moro
Analysis of synchronization phenomena in star-coupled Wien-bridge oscillators using distorted waves. 831-833 - Michal Tadeusiewicz
A method for multiple fault diagnosis in dynamic analogue circuits. 834-837 - Andrzej Pulka
A common-sense based approach to the automated test-point selection in fault diagnosis. 838-841 - Zygmunt A. Garczarczyk:
Polynomial fault diagnosis of linear analog circuits. 842-845 - Michael G. Dimopoulos, Dimitris K. Papakostas, Alkis A. Hatzopoulos
Design and development of a versatile testing system for analog and mixed-signal circuits. 846-849 - Tejaswi Gowda
Synthesis of threshold logic circuits using tree matching. 850-853 - William Prodanov, Maurizio Valle
Behavioral models of basic mixed-mode circuits: practical issues and application. 854-857 - Marian Pierzchala, Benedykt Rodanski:
Road map representation of s-expanded symbolic network functions. 858-861 - Giovanni B. Vece, Simone Orcioni
Bluetooth Baseband power analysis with PKtool. 862-865 - Masatoshi Sato, Hisashi Aomori, Mamoru Tanaka:
A path searching method based on circuit analysis for nonlinear resistive networks. 866-869 - Roisin Duignan, Paul F. Curran:
Absolute stability of single variable Lur'e systems. 870-873 - Alessio Boggiano, Simone Delfitto, Tomaso Poggi
FPGA implementation of a new scheme for the circuit realization of PWL functions. 874-877 - Federico Bizzarri
PWL approximation of the Hindmarsh-Rose neuron model in view of its circuit implementation. 878-881 - Byungseung Lee, Byungill Kim, Juneseok Lee, Sanghoon Hwang, Minkyu Song, Tad Wysocki:
A small chip area 12-b 300MS/s Current Steering CMOS D/A converter based on a laminated-step layout technique. 882-885 - Stefan Joeres, Song-Bok Kim, Stefan Heinen:
Simulation of quadrature-bandpass Sigma-Delta analog to digital converters using state space descriptions. 886-889 - Markus Voltti, Tero Koivisto, Esa Tiiliharju:
Comparison of active and passive mixers. 890-893 - Sean Harte, Brendan O'Flynn
Design and implementation of a miniaturised, low power wireless sensor node. 894-897 - Masato Ogata, Tetsuo Nishi:
Topological conditions for passive switches in switching converters. 898-901 - Timo Rahkonen
A Matlab tool for analysis of switch-mode power supplies. 902-905 - Horia Andrei, Fanica Spinei:
The minimum energetical principle in electric and magnetic circuits. 906-909 - Carl Renneberg
Analog circuits for thermistor linearization with Chebyshev-optimal linearity error. 910-913 - Paolo Maffezzoni, Lorenzo Codecasa
Closed-Form expression of frequency pulling in unlocked-driven nonlinear oscillators. 914-917 - Michele Bonnin
Harmonic balance, Melnikov method and nonlinear oscillators under resonant perturbation. 918-921 - Ryo Imabayashi, Yoko Uwate, Yoshifumi Nishio
Breakdown of synchronization in chaotic oscillators and noisy oscillators. 922-925 - Takuya Hamada, Yoshihiko Horio, Kazuyuki Aihara:
An IC implementation of a hysteresis two-port VCCS chaotic oscillator. 926-929 - Juan Núñez
Correct operation in SMOBILE-based quasi-differential quantizers. 930-933 - Gaurav Gandhi, Tamás Roska, Árpád Csurgay:
Single electron transistor based chua type chaotic circuit: A SPICE assisted proof. 934-937 - Ismo Hänninen, Jarmo Takala
Pipelined array multiplier based on quantum-dot cellular automata. 938-941 - Oana Boncalo, Mihai Udrescu, Lucian Prodan, Mircea Vladutiu, Alexandru Amaricai:
Assessing quantum circuits reliability with mutant-based simulated fault injection. 942-945 - Daniel Durini
SOI pixel detector based on CMOS time-compression charge-injection. 946-949 - Nicola Massari, Syed Arsalan Jawed, Massimo Gottardi:
A collision-free time-to-first spike camera architecture based on a winner-take-all network. 950-953 - Péter Földesy, Ákos Zarándy, Csaba Rekeczky, Tamás Roska:
3D integrated scalable focal-plane processor array. 954-957 - Mohamad Rahal, Andreas Demosthenous:
A readout system for inductive position sensors. 958-961 - Timo Veijola:
AN electrical equivalent circuit model For RF MEMS disk resonators. 962-965 - Arturo Sarmiento-Reyes
FFinder: A MAPLE-based CAD frame for identifying feedback loops in electric circuits. 966-969 - Lucia Dumitriu, Mihai Iordache, Nicolae Voicu:
Symbolic hybrid analysis of nonlinear analog circuits. 970-973 - Erik Lindberg:
Systematic equation formulation. 974-977 - Víctor Manuel Jimenez-Fernandez
Applying an iterative-decomposed piecewise-linear model to find multiple operating points. 978-981 - Michal Tadeusiewicz
Finding all the DC solutions of transistor circuits with the thermal constraint. 982-985 - Ulrich L. Rohde, Ajay K. Poddar:
Noise cancellation and noise minimization techniques for low cost compact size configurable RF oscillators/VCOs. 986-989 - Grzegorz Szczepkowski, Gerard Baldwin, Ronan Farrell
Wideband 0.18μm CMOS VCO using active inductor with negative resistance. 990-993 - Antonio Buonomo, Alessandro Lo Schiavo:
Large-signal analysis of CMOS - LC VCOs. 994-997 - Ulrich L. Rohde, Ajay K. Poddar:
Self-injection locked compact coupled planar resoator based cost-effective ultra low phase noise VCOs For wireless systems. 998-1001 - Mark M. Gourary, Sergey G. Rusakov
A numerical technique for time domain noise analysis of oscillators. 1002-1005 - Dalibor Biolek
Analysis of switching effects in DC-DC converters via bias point computation. 1006-1009 - Yuehui Huang, Chi K. Tse:
Classification of parallel DC/DC converters part I: circuit theory. 1010-1013 - Yuehui Huang, Chi K. Tse:
Classification of parallel DC/DC converters part II: Comparisons and experimental verifications. 1014-1017 - E. Rodriguez-Vilamitjana, Alberto Poveda, Abdelali El Aroudi, E. Alarcon:
Ripple-based Period-2 bifurcation border detection in switching power regulators. 1018-1021 - Cenk Dincbakir, M. Oruç Bilgiç:
Four-quadrant switch-mode gyrator. 1022-1025 - Ahmet Samil Demirkol, Vedat Tavas, Serdar Özoguz
High frequency chaos oscillators with applications. 1026-1029 - Donato Cafagna
Chaotic dynamics of the fractional Chua's circuit: Time-domain analysis via decomposition method. 1030-1033 - Caitriona Boushel, Paul F. Curran:
The bifurcation behaviour of a novel second order model of the Hodgkin-Huxley Neuron. 1034-1037 - Sergio Callegari
Some more robustness conditions for the invariant density of a class of 1D maps under additive noise. 1038-1041
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