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ECCTD 2009: Antalya, Turkey
- 19th European Conference on Circuit Theory and Design, ECCTD 2009, Antalya, Turkey, August 23-27, 2009. IEEE 2009, ISBN 978-1-4244-3896-9
- Sonia Vargas-Sierra
, Elisenda Roca
APS design alternatives in 0.18μm CMOS image sensor technology. 1-4 - Markus Gronholm, Jonne Poikonen, Mika Laiho
A ring-oscillator-based active quenching and active recharge circuit for single photon avalanche diodes. 5-8 - Daniel Durini
Double modified internal gate (MIG) pixel for fluorescence imaging applications. 9-12 - Michele Dei
A low power CMOS capacitance to pulse duration converter based on a dual clock approach. 13-16 - Martin Daricek, Martin Donoval, Alexander Satka
Behavior of various geometry MagFET structures. 17-20 - Firat Kaçar
Novel electronically tunable FDNR simulator employing single FDCCII. 21-24 - Vaibhav Maheshwari, Wouter A. Serdijn:
Syllabic companding baseband switched capacitor filter for WLAN 802.11a/g receivers. 25-28 - Viswanathan Balasubramanian
A novel complex Gm-C IF sub-sampling mixer. 29-32 - Yahya Lakys
A new 2nd order variable-state filter: The frequency agile filter. 33-36 - Nicodimus Retdian, Katsuyuki Takagi, Shigetaka Takagi:
Capacitance spread reduction technique for low-cost switched-capacitor filters implementation. 37-40 - Mohammad Masoumi, Erik Markert
Ultra low power flash ADC for UWB transceiver applications. 41-44 - Zhiguo Song, Caroline Lelandais-Perrault, Daniel Poulton, Philippe Bénabès:
Adaptive equalization for calibration of subband hybrid filter banks A/D converters. 45-48 - Toru Sai, Yasuhiro Sugimoto:
A 14-bit MOS DAC with current sources free from power-line voltage drop and with output circuits free from code-dependent variable time constant. 49-52 - Esmaeil Najafi Aghdam
Completely first order and tone free partitioned data weighted averaging technique used in a multibit delta sigma modulator. 53-56 - Seyed Ebrahim Esmaeili, A. J. Al-Khalili, Glenn E. R. Cowan:
Dual-edge triggered energy recovery DCCER flip-flop for low energy applications. 57-60 - Massimo Alioto, Elio Consoli, Gaetano Palumbo:
Impact of clock slope on energy/delay of pulsed flip-flops and optimum clock domain design. 61-64 - Nazrul Anuar
4-bit ripple carry adder of two-phase clocked adiabatic static CMOS logic: A comparison with static CMOS. 65-68 - Yngvar Berg, Omid Mirmotahari
Ultra low voltage and high speed CMOS carry generate circuits. 69-72 - Pradeep S. Nair, Santosh Koppa, Eugene B. John
Topology selection of FPGA look-up tables for low-leakage operation. 73-76 - Giovanni Egidio Pazienza, Leon O. Chua:
Quasi global-equivalence in one-dimensional binary cellular automata. 77-80 - Angela Slavova:
New wave profiles in viscoelastic burgers' RTD-based cellular neural networks model. 81-84 - Alexandru Gacsádi, Péter Szolgay:
Variational computing based images denoising methods by using cellular neural networks. 85-88 - Ghader Yosefi
Design of new CMOS current mode min and max circuits for FLC chip applications. 89-92 - Jonne Poikonen, Mika Laiho
Locally adaptive image sensing with the 64x64 cell MIPA4k mixed-mode image processor array. 93-96 - Antonio J. Ginés
On-line estimation of the integral non-linear errors in analogue-to-digital converters without histogram evaluation. 97-100 - Antonio J. Ginés
A survey on digital background calibration of ADCs. 101-104 - Shakeel Ahmad, Jerzy J. Dabrowski:
On-chip stimuli generation for ADC dynamic test by ΣΔ technique. 105-108 - Heng Zhang, Mohamed Mostafa Elsayed, Edgar Sánchez-Sinencio:
New applications and technology scaling driving next generation A/D converters. 109-112 - Bharath K. Vasan, Jingbo Duan, Chen Zhao, Randall L. Geiger, Degang Chen:
Signal generators for cost effective BIST of ADCs. 113-116 - Erkan Nevzat Isa, Dominique Morche, Catherine Dehollain:
Generalized multiplying D/A converter stages for low-power pipelined A/D converters. 117-120 - Wenshan Zhao, Yichuang Sun, Xi Zhu, Yigang He:
Design of high-frequency Gm-C wavelet filters. 121-124 - Marius Neag
A new OTA-C universal biquad resonates out the main parasitic capacitance. 125-128 - Marian Pierzchala, Mourad Fakhfakh:
Novel structures of RC-active filters for tapped capacitor resonant circuits. 129-132 - Umut Engin Ayten
Current-mode SITO filter using a single active component. 133-136 - Mihaela Popescu
On the cascade control system tuning for shunt active filters based on modulus optimum criterion. 137-140 - Akio Tsuneda, Yasunori Miyazaki:
Performance evaluation of LFSR-based spreading sequences with negative auto-correlation designed by Chaos theory of modulo-2 added sequences. 141-144 - Alberto Oliveri
Circuit implementation of piecewise-affine functions based on a binary search tree. 145-148 - Miguel Ángel Gutiérrez de Anda, Isabelo Meza Dector, Juan Carlos Sanchez Garcia:
A parameter-varying lowpass filter with reduced transient response. 149-152 - Senad Hiseni, Chutham Sawigun
Dynamic translinear nonlinear energy operator. 153-156 - Yavuz Delican, Avni Morgül
High performance 16-bit MCML multiplier. 157-160 - Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi:
High speed VLSI implementation of a finite field multiplier using redundant representation. 161-164 - Amit Acharyya
Hardware efficient fixed-point VLSI architecture for 2D Kurtotic FastICA. 165-168 - Tomoshige Inoue, Hirotaka Koizumi:
A voltage equalizer applying a charge pump for energy storage systems. 169-172 - Gustavo Liñán Cembrano
A focal plane processor for continuous-time 1-D optical correlation applications. 173-176 - Leonardo Nicolosi, Ronald Tetzlaff
Omnidirectional algorithm for the full penetration hole extraction in laser welding processes. 177-180 - Feijun Jiang, Bertram E. Shi
The memristive grid outperforms the resistive grid for edge preserving smoothing. 181-184 - Péter Földesy, Ricardo Carmona-Galán
3D multi-layer vision architecture for surveillance and reconnaissance applications. 185-188 - Mika Laiho
Space-dependent binary image processing within a 64x64 mixed-mode array processor. 189-192 - Piotr Dudek, Alexey Lopich, Viktor Gruev:
A pixel-parallel cellular processor array in a stacked three-layer 3D silicon-on-insulator technology. 193-196 - Michael Soudan, Ronan Farrell
On a filter bank correction scheme for mitigating mismatch distortions in time-interleaved converter systems. 197-200 - Golnar Khodabndehloo, Mitra Mirhassani, Majid Ahmadi:
An area-speed efficient method for current mode analog to digital converters. 201-204 - Nooshin Ghaderi
A CMOS 3.2 GB/s serial link transceiver, using PWM and PAM scheme. 205-208 - Sherlyn C. dela Cruz, Mark Gerard T. delos Reyes, Terence C. Gaffud, Tanya Vanessa F. Abaya, Maria Theresa A. Gusad, Marc D. Rosales:
Design and implementation of operational amplifiers with programmable characteristics in a 90nm CMOS process. 209-212 - Masood Teymouri, Khayrollah Hadidi, Abdollah Khoei
A new linear readout circuit for a CMOS image sensor. 213-216 - Erik Lindberg
An eigenvalue study of a double integrator oscillator. 217-220 - Ebrahim Farshidi:
A current-mode euclidean distance calculator based on electronically simulated translinear principle. 221-224 - Dalibor Biolek
Single-input multi-output resistorless current-mode biquad. 225-228 - Ali Kircay, M. Serhat Keserlioglu, Ugur Çam:
A new current-mode square-root-domain notch filter. 229-232 - Jani Pehkonen, Juha Kostamovaara:
A CMOS front end for a laser rangefinder with resonance-based timing discrimination. 233-236 - Hubert Filiol, Ian O'Connor
Piecewise-polynomial modeling for analog circuit performance metrics. 237-240 - Arturo Sarmiento-Reyes
Modelling the single-electron transistor with piecewise linear functions. 241-244 - Hüseyin Alpaslan Yildiz, Leyla Gören Sümer
Lagrangian modeling of DC-DC buck-boost and flyback converters. 245-248 - Dalibor Biolek
SPICE modeling of memristive, memcapacitative and meminductive systems. 249-252 - Janusz Zarebski
Properties of silicon carbide schottky diodes under self-heating influence. 253-256 - Amir H. Miremadi, Ahmad Ayatollahi
A low voltage CMOS analog multiplier with high linearity. 257-262 - Juan M. Carrillo
Compact low-voltage rail-to-rail bulk-driven CMOS opamp for scaled technologies. 263-266 - Juan M. Carrillo
Input common-mode voltage behaviour of CMOS bulk-driven differential stages. 267-270 - Aravind Heragu, Viswanathan Balasubramanian
A concurrent quadrature sub-sampling mixer for multiband receivers. 271-274 - Liangge Xu, Kari Stadius, Tapio Rapinoja, Jussi Ryynänen
Agile frequency synthesizer for cognitive radios. 275-278 - Abbas Bayramnejad, Davud Asemani, Saadan Zokaei:
A tunable multi-band CMOS LNA for mobile WiMAX. 279-282 - Vesa Turunen, Marko Kosunen
Spectrum estimator and cyclostattionary detector for cognitive radio. 283-286 - Joos Vandewalle:
Critical issues and current views on teaching basic circuits and systems in electrical engineering education. 287-290 - Stefan Ludwig, Wolfgang Mathis
Model reduction of linear networks with nonlinear elements. 291-294 - Metin Sengül
Cascaded lossless commensurate line synthesis. 295-298 - Masanori Oishi, Seiichiro Moro
A modified method for circuit analysis using haar wavelet transform with adaptive resolution - For circuits with waveform with sharp convex ranges -. 299-302 - Dragan Kandic
On synthesis of immitance matrices of transformerless RLC networks. 303-306 - Devrim Yilmaz Aksin
Single-ended input four-quadrant multiplier for analog neural networks. 307-310 - Hisashi Aomori, Yuki Naito, Tsuyoshi Otake, Nobuaki Takahashi, Ichiro Matsuda, Susumu Itoh, Mamoru Tanaka:
Hardware-aware model of sigma-delta cellular neural network. 311-314 - Mihaly Radvanyi
Crosswalks recognition through CNNs for the bionic camera: Manual vs. automatic design. 315-318 - Vahid Majidzadeh, Alexandre Schmid
A micropower neural recording amplifier with improved noise efficiency factor. 319-322 - Murat Simsek
An efficient inverse ANN modeling approach using prior knowledge input with difference method. 323-326 - Mark M. Gourary, Sergey G. Rusakov
Improved harmonic balance technique for analysis of ring oscillators. 327-330 - Elena Blokhina
Excitation of multiple spatial modes of a MEMS cantilever in the pulsed digital oscillator. 331-334 - Michele Bonnin
Phase model reduction and synchronization of nonlinear oscillators by a periodic force. 335-338 - Antonio Buonomo, Alessandro Lo Schiavo:
Nonlinear analysis of quadrature LC-VCOs. 339-342 - Chuang Bi, Orla Feely
Nonlinear dynamics of alias-locked loop. 343-346 - Ali Dadashi, Khayrollah Hadidi, Abdollah Khoei
A new fully differential adaptive CMOS line driver suitable for ADSL applications. 347-350 - Mohammad Soleimani, Abdollah Khoei
Design of high-speed high-precision voltage-mode MAX-MIN circuits with low area and low power consumption. 351-354 - Luís Nero Alves
A new technique to achieve exact and controllable voltage gain relations in feedback amplifiers. 355-358 - Abid Uveys Danis, Berna Örs
Differential power analysis attack considering decoupling capacitance effect. 359-362 - Mikko Hulkkonen, Timo Veijola, Antti Kallio, Mikael Andersson, Martti Valtonen:
Measurement-based equivalent circuit model for ferrite beads. 363-366 - Enrico F. Calandra, Daniele Lupo, Lorenzo Puccio:
A DRO-based X-band injection-locked amplifier without input non-reciprocal elements. 367-370 - Antti Kallio, Timo Veijola, Janne Roos, Mikael Andersson, Martti Valtonen:
General measurement-based circuit model for symmetrical four-port RF transformers. 371-374 - Matteo Contaldo, Christian C. Enz:
Analysis of a novel BAW-based power amplifier. 375-378 - Renan Kazazoglu, Ediz Cetin
GNSScope and the split chip compression technique. 379-382 - Homayoon Oraizi, Ebrahim Forati, Mehdi Seyyed Esfahlan:
A novel topology for the implementation of active distributed multiplexers. 383-386 - Debdeep Mukhopadhyay:
A new fault attack on the advanced encryption standard hardware. 387-390 - Benedikt Gierlichs, Elke De Mulder, Bart Preneel
Empirical comparison of side channel analysis distinguishers on DES in hardware. 391-394 - Takeshi Sugawara
Differential power analysis of AES ASIC implementations with various S-box circuits. 395-398 - Tsutomu Matsumoto, Hidenobu Mimura, Daisuke Suzuki:
Complementary logics vs masked logics: Which countermeasure is a better selection? 399-402 - Toshihiro Katashita
Development of side-channel attack standard evaluation environment. 403-408 - Michael Hutter, Jörn-Marc Schmidt, Thomas Plos:
Contact-based fault injections and power analysis on RFID tags. 409-412 - Iulian B. Ciocoiu
ECG signal compression using wavelet foveation and SPIHT. 413-416 - Chutham Sawigun
A nano-power class-AB current multiplier for energy-based action potential detector. 417-420 - Toivo Paavle, Mart Min
Wideband object identification with rectangular wave chirp excitation. 421-424 - Jens Masuch, Manuel Delgado-Restituto
Design constraints for the inductive power and data link of an implanted body sensor. 425-428 - Frank Gollas, Ronald Tetzlaff
Analysis of local activity in reaction-diffusion networks: EEG signals in epilepsy. 429-432 - Sneha Lele, Robert Sobot, Matthew Waxer, J. Bruce Morton:
Steady-state visually evoked EEG signal processing with tuneable continuous-time bandpass sigma-delta modulators. 433-436 - Ebrahim Farshidi:
A low-voltage class-AB linear transconductance based on floating-gate MOS technology. 437-440 - Yngvar Berg, Omid Mirmotahari
Clocked semi-floating-gate pseudo differential pair for low-voltage analog design. 441-444 - Yngvar Berg, Omid Mirmotahari
Clocked semi-floating-gate ultra low-voltage current multiplier. 445-448 - Milan Stork, Josef Hrusak, Daniel Mayer:
Analog-digital coincidence mixer for frequency synthesizers. 449-452 - Marko Neitola
A systematic approach for testing a DAC mismatch shaping method. 453-456 - Tomasz Podsiadlik, John Dooley, A. Canniff, Ronan Farrell
Pulse width modulation of multilevel delta-sigma output for class S power amplifier. 457-460 - Ashraf Samarah
High-performance coherent digital sweep oscillator using piecewise parabolic interpolation. 461-465 - Marco Righero, Oscar De Feo, Mario Biey:
A cooperation index based on correlation matrix spectrum and ráenyi entropy. 466-469 - Mahmoud Zangeneh, Nasser Masoumi:
An analytical delay reduction strategy for buffer-inserted global interconnects in VDSM technologies. 470-475 - Josef Dobes, Zdenek Kolka:
Improving convergence of algorithms for solving systems of circuit algebraic-differential equations. 476-479 - Mashuq Un Nabi
Krylov-subspace based model order reduction for field-circuit coupled systems. 480-484 - Gregor Cijan, Tadej Tuma, Árpád Bürmen:
A direct search method for finding the worst performance measure in integrated circuit design. 485-488 - Michal Tadeusiewicz
Improved algorithm for computing all the DC operating points of diode-transistor circuits. 489-492 - Mahmoud Zangeneh, Hossein Aghababa, Behjat Forouzandeh:
Design of a two-capacitor sample & hold circuit using a two-stage OTA with hybrid cascode compensation. 493-498 - Hossein Shokri Kojori, Mohammad Yavari
A systematic design procedure for CMOS three-stage NMC amplifiers. 499-502 - Radu Matei:
Resistive networks for signal and image filtering in the haar basis. 503-506 - Iman Madadi, Shahin Jafarabadi-Ashtiani
Optimizing power-area for constant input-referred noise level in MOSFETs. 507-510 - Tomoaki Maekawa, Shuhei Amakawa
Design of CMOS inverter-based output buffers adapting the cherry-hooper broadbanding technique. 511-514 - Chang-Seok Choi, Hanho Lee:
High-speed low-complexity three-parallel reed-solomon decoder for 6-Gbps mmWave WPAN systems. 515-518 - Martin Donoval, Martin Daricek, Juraj Marek, Viera Stopjaková
Vertical and horizontal magnetic force sensor and application of sensor in power devices. 519-522 - Farhad Haj Ali Asgari, Majid Ahmadi, Q. M. Jonathan Wu:
Low power high performance keeper technique for high fan-in dynamic gates. 523-526 - Candice Müller, Maurizio Valle
Mixed-mode behavioral model of flexray physical layer transceiver. 527-530 - Pekka Miettinen, Mikko Honkala, Janne Roos, Martti Valtonen:
Partitioning-based second-order model-order reduction method for RC circuits. 531-534 - Moussa Yahia, Pascal Acco
Particle filter applied to polynomial chaotic maps. 535-538 - M. Asgar, Ebrahim Afjei
A new modified asymmetric bridge drive circuit switched reluctance motor. 539-542 - Valeri M. Mladenov
A method for searching the limit cycles of high order sigma-delta modulators. 543-546 - Fausto Sargeni
Programmable non-linearity for STAR cellular neural networks. 547-550 - Xavier Vilasís-Cardona, Mireia Vinyoles-Serra:
Comparison between chua-yang and hyperbolic CNNs. 551-554 - Piotr Kyziol, Damian Grzechca
Multidimensional search space for catastrophic faults diagnosis in analog electronic circuits. 555-558 - Can Eroglu, F. Acar Savaci
Implementation of partial synchronization of different chaotic systems by field programmable gate array. 559-562 - Ahmad Afifi, Ahmad Ayatollahi
Implementation of biologically plausible spiking neural network models on the memristor crossbar-based CMOS/nano circuits. 563-566 - Roisin Duignan, Paul F. Curran:
Absolute stability of 2nd order discrete-time single variable lur'e systems. 567-570 - Zbigniew Galias
Analysis of periodic solutions of discretized single input sliding mode control systems. 571-574 - Leonidas Georgopoulos, Martin Hasler:
Early consensus in complex networks under variable graph topology. 575-578 - Mihai Iordache, Lucia Dumitriu, Lucian Mandache:
Two time-scale approach implemented on hybrid equations. 579-583 - Federico Bizzarri
On the synthesis of periodic signals by discrete pulse-trains and optimisation techniques. 584-587 - Ahmed S. Elwakil
A low frequency oscillator structure. 588-590 - Habib Adrang, Hossein Miar Naimi:
A novel method for analysis and design of third-order charge pump PLL. 591-594 - Grzegorz Szczepkowski, Ronan Farrell
Noise and dynamic range of CMOS degenerated active inductor resonators. 595-598 - Younis Allasasmeh, Stefano Gregori
A performance comparison of dickson and fibonacci charge pumps. 599-602 - Kamelia Nikolova
Low-sensitivity design and implementation of allpass based fractional delay digital filters. 603-606 - Mikko Honkala, Ville Karanko, Janne Roos, Martti Valtonen:
Frequency/time block preconditioners for harmonic balance jacobians. 607-610 - Bo Liu, Francisco V. Fernández
A fuzzy selection based constraint handling method for multi-objective optimization of analog cells. 611-614 - Tuukka Tuomisto, Anu Lehtovuori, Jarmo Virtanen, Janne Roos, Mikko Honkala, Martti Valtonen:
Enhanced multivariate steady-state time-domain method. 615-618 - Faik Baskaya, David V. Anderson, Paul E. Hasler, Sung Kyu Lim
A generic reconfigurable array specification and programming environment (GRASPER). 619-622 - Nima Taherinejad, Adib Abrishamifar:
A new high speed, low power adder; using hybrid analog-digital circuits. 623-626 - Kieran O'Neill, Brian Fitzgibbon, Kaveh Hosseini, Michael Peter Kennedy
Calculation of cycle lengths in MASH 1-2-2 digital delta sigma modulators with a constant input. 627-630 - Athanasios Stefanou, Georges G. E. Gielen
Mitigation of the sampling and substrate noise induced distortion in regenerative comparators by adaptive interpolation. 631-634 - Indrit Myderrizi
A high-speed swing reduced driver suitable for current-steering digital-to-analog converters. 635-638 - Homayoon Oraizi, Mehdi Seyyed Esfahlan, Ebrahim Forati:
Design of stepped-impedance low pass filters with impedance matching by the particle swarm optimization and conjugate gradient method. 639-642 - Toru Nakura, Yutaro Tatemura, Görschwin Fey
SAT-based ATPG testing of inter- and intra-gate bridging faults. 643-646 - Michal Tadeusiewicz
Multiple catastrophic fault diagnosis of linear circuits considering the component tolerances. 647-650 - Piotr Jantos, Damian Grzechca
A global parametric faults diagnosis with the use of artificial neural networks. 651-654 - Lukas Chruszczyk
Specialised aperiodic excitation and wavelet transform improves analogue fault diagnosis. 655-658 - Damian Grzechca
Faults classification in analog electronic circuits with use of the SVM algorithm. 659-662 - Erik Lindberg
Autonomous third-order duffing-holmes type chaotic oscillator. 663-666 - Hiroyuki Asahara, Takuji Kousaka:
Experimental study of an interrupted electric circuit with spike noise. 667-670 - Hitoshi Aburatani, Suguru Yamane, Takeo Imoto, Masayuki Yamauchi, Yoshifumi Nishio
Propagation mechanism of phase-inversion wave in 2D lattice oscillators and their application to prediction of time-series data. 671-674 - Jiming Jiang, David M. Holburn:
Design and analysis of a low-power highly linear mixer. 675-678 - Kazuhisa Yoshimatsu, Masayuki Yamauchi, Mamoru Tanaka:
Analyses of motion and acceleration sensors using printed spiral inductors by a simulator and actual circuit experiments. 679-682 - Jorge Fernández-Berni
Accurate design of a MOS-based resistive network for time-controlled diffusion filtering. 683-686 - Pravoslav Martínek, Petr Bores, Dasa Ticha:
Filter approximation problem using de algorithms. 687-690 - Mohammad Hekmat Kashtiban, Seyed Javad Azhari:
A novel wideband-high-CMRR low-voltage BJT current output stage. 691-694 - Yasutaka Haga, Izzet Kale:
Class-AB rail-to-rail CMOS buffer with bulk-driven super source followers. 695-698 - Muhammet Köksal
A new second-order multi-mode multi-funtion filter using a single CDBA. 699-702 - Takayuki Hayashi, Masahiro Fukui, Shuji Tsukiyama:
A new power grid optimization algorithm based on manufacturing cost restriction. 703-706 - Shuji Tsukiyama, Masahiro Fukui:
Accuracy of the criticality probabilty of a path in statistical timing analysis. 707-710 - Francesco Zanini, David Atienza
Multicore thermal management with model predictive control. 711-714 - Paula López
A study of CMOS radiation tolerant transistors using green functions. 715-718 - Noha Younis, Mahmoud Ashour, Amin M. Nassar:
Power efficient polyphase comb decimation filters for ΣΔ modulators in multi-rate digital receivers. 719-722 - Brian Fitzgibbon, Kieran O'Neill, Andrew Grannell, Ciarán Horgan, Zhipeng Ye, Kaveh Hosseini, Michael Peter Kennedy
A spur-free MASH digital delta-sigma modulator with higher order shaped dither. 723-726 - Esa Tiiliharju:
Quadrature modulator model with third-order non-linearities. 727-730 - Stefan Erb, Wolfgang Pribyl:
An accurate and efficient method for BER analysis in high-speed communication systems. 731-734 - Fadhel M. Ghannouchi:
An S band RF digital linearizer for TWTAs and SSPAs. 735-738 - Andrea Agnes, Franco Maloberti:
Multi-bit high-order incremental converters with digital calibration. 739-742 - Swathi Marri, Jaime Ramírez-Angulo, Antonio J. López-Martín
A new scheme for DC offset compensation and its application to current mode and voltage mode D/A converters. 743-746 - Vincent Kerzerho, Philippe Cauvet, Serge Bernard
A multi-converter DFT technique for complex SIP: Concepts and validation. 747-750 - Toru Sai, Yasuhiro Sugimoto:
Design of a 1-V operational passive sigma-delta modulator. 751-754 - Elisenda Roca
Hierarchical synthesis based on pareto-optimal fronts. 755-758 - Gerd Vandersteen, Ludwig De Locht:
Qualification and quantification of the nonlinear distortions in discrete-time sigma-delta ADCs. 759-762 - Georges G. E. Gielen
Towards automated extraction of EMC-aware trajectory-based macromodels for analog circuits. 763-766 - Pengbo Sun, Cristian Ferent, Michael Gilberti, Alex Doboli:
Online AMS frontend reconfiguration for sensor network applications. 767-770 - Engin Avci, Martin Strasser, Helmut Graeb, Ulf Schlichtmann
A free-shape router for analog and RF applications. 771-774 - Pedro Sousa, Carla Duarte, Manuel F. M. Barros
Enhancing analog IC design optimization kernels with simple fuzzy models. 775-778 - Massimo Alioto, Elio Consoli, Gaetano Palumbo, Melita Pennisi:
Correct procedures to evaluate the effect of intradie variations on the delay variability of digital circuits. 779-782 - Marissa Condon, Georgi G. Grahovski
A parametric macromodelling technique. 783-785 - Mircea R. Stan
Electromigration-aware design. 786-789 - Akihiko Eguchi, Kazuya Kishida, Takashi Kambe, Makoto Saituji:
An application specific circuits design for a LVCSR system. 791-793 - Ung Choi, Yoon-Jung Kim, Young-Soo Kim:
Crosstalk reduction in printed circuit boards using irregularly-spaced vias in a guard trace over a slotted ground plane. 794-797 - S. C. Ramesh, M. Mohamed Ismail Majeed:
Implementation of a visible watermarking in a secure still digital camera using VLSI design. 798-801 - Olli Lahdenoja, Mika Laiho
Regional image correspondence matching method for SIMD processing. 802-805 - Giovanni Costantini
On the use of memory for detecting musical notes in polyphonic piano music. 806-809 - Irina Dornean, Marina Dana Topa, Botond Sándor Kirei
Sub-band adaptive filtering for acoustic echo cancellation. 810-813 - Norikazu Takahashi
On clustering coefficients of graphs with the fixed numbers of vertices and edges. 814-817 - Nima Taherinejad:
Highly reliable harmony search algorithm. 818-822 - Zoltán Kincses, Zoltán Nagy, László Orzó, Péter Szolgay, György Mezo
Implementation of a parallel SAD based wavefront sensor architecture on FPGA. 823-826 - Zoltán Nagy, András Kiss, Sándor Kocsárdi, Árpád Csík:
Computational fluid flow simulation on body fitted mesh geometry with IBM cell broadband engine architecture. 827-830 - Ramazan Yeniceri
An emulated digital wave computer core implementation. 831-834 - Cesar Diaz-Resco, Alejandro Nieto, Roberto R. Osorio
A digital cellular-based system for retinal vessel-tree extraction. 835-838 - Jordi Albo-Canals, José A. Villasante-Bembibre, Jordi Riera-Babures, Natalia A. Fernandez-Garcia, Víctor M. Brea
An efficient FPGA implementation of a DT-CNN for small image gray-scale pre-processing. 839-842 - Laszlo Furedi, Péter Szolgay:
CNN model on stream processing platform. 843-846 - M. S. Afjei, Ebrahim Afjei
Insufficiency in finite difference solution of cylindrical time varying magnetic problems. 847-850 - S. A. Fatemi, H. Moradi Cheshmehbeigi
Self-tuning approach to optimization of excitation angles for switched-reluctance motor drives. 851-856 - H. Moradi Cheshmehbeigi
Design and analysis of low torque ripple switched reluctance motor using 3-dimensional finite element method. 857-861 - Horia Andrei, Fanica Spinei, Paul Andrei, Ulrich L. Rohde, Marius Alexandru Silaghi, Helga Maria Silaghi:
Evaluation of hilbert space techniques and lagrange's method for the analysis of dissipated power in DC circuits. 862-865 - Celaleddin Yeroglu
Development of a toolbox for frequency response analysis of fractional order control systems. 866-869 - Corneliu Rusu
Converting a set into a minimum-phase sequence. 870-873 - Ying Ying Zhang, Taskin Koçak:
Energy-efficent, high-performance viterbi ACS unit implementation in 90nm CMOS. 874-877 - Ehsan Kargaran, Hamed Kargaran:
A low power ultra-wideband CMOS LNA with inter stage technique. 878-881 - Takashi Yasuno, Yoshinao Suzuki, Hisato Fujisaka, Takeshi Kamio, Chang-Jun Ahn, Kazuhisa Haeiwa:
A single-eletron bandpass digital wave filter. 882-885 - Yasuhiro Okada, Hisato Fujisaka, Takeshi Kamio, Chang-Jun Ahn, Kazuhisa Haeiwa:
Ising spin-grass error correction for unreliable nanoelectronic logic circuits. 886-889 - Mustafa Berke Yelten, Kevin G. Gard:
Theoretical analysis and characterization of the tunable matching networks in low noise amplifiers. 890-893 - Masoud Baghelani, Habib Badri Ghavifekr:
New design of RF MEMS disk resonators and optimization for spurious modes. 894-897 - Masoud Ensafdaran, Mojtaba Atarodi:
A noise shaped flash time to digital converter for all digital frequency synthesizers. 898-901 - Hideaki Okazaki, Hideo Nakano:
Brayton - Moser's equations of transmission line circuits and their complete stability. 902-905
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