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23rd ICECS 2016: Monte Carlo, Monaco
- 2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016, Monte Carlo, Monaco, December 11-14, 2016. IEEE 2016, ISBN 978-1-5090-6113-6
A1L-A Emerging Technologies
- Federico Alimenti, Chiara Mariotti, Maicol Silvestri, Valentina Palazzi
, Marco Virili, Paolo Mezzanotte, Luca Roselli
Demonstration of 2.4 GHz vector modulator for RF wireless systems on cellulose-based substrates. 1-4 - Nicola Lupo
An integrated rad-hard test-vehicle for embedded emerging memories. 5-8 - Alexandra L. Zimpeck, Ygor Aguiar
Geometric variability impact on 7nm Trigate combinational cells. 9-12 - Moataz Elkhayat, Stefano Mangiarotti, Claudio De Berti, Marco Grassi
Device matching measurements in 28nm technology for high energy physics experiments. 13-16 - Davide Patti, Giovanni Castorina
2-V turn-on voltage field-emitting vacuum nanoelectronic device. 17-20
A1L-B Analog-to-Digital Converters
- Mina Assarzadeh, Mehdi Saberi, Mohammad Tohidi, Farshad Moradi
A low-power time-based phase-domain analog-to-digital converter. 21-24 - Yuwadee Sundarasaradula, Timothy G. Constandinou
A 6-bit, two-step, successive approximation logarithmic ADC for biomedical applications. 25-28 - Nguyen Ngoc Mai Khanh, Rimon Ikeno, Takahiro J. Yamaguchi, Tetsuya Iizuka, Kunihiro Asada:
Experimental demonstration of stochastic comparators for fine resolution ADC without calibration. 29-32 - Yulin Zhang, Edoardo Bonizzoni, Franco Maloberti:
Mismatch and parasitics limits in capacitors-based SAR ADCs. 33-36 - Lei Zhou, Weizhong Li, DanYu Wu, Fan Jiang, Daojun Xue, Jin Wu, Xinyu Liu:
A 30Gsps 6bit DAC in SiGe BiCMOS technology. 37-40
A1L-C SS1. Oscillator-Based Computing
- Bo Wang, Hanyu Wang, Miao Qi:
A reliable PPV characterization method for memristor-based oscillators. 41-44 - György Csaba
Neural network based on parametrically-pumped oscillators. 45-48 - Lieuwe B. Leene, Timothy G. Constandinou
A 0.45V continuous time-domain filter using asynchronous oscillator structures. 49-52 - Alexander Kushnerov
Stacking voltage-controlled oscillators: Analysis and application. 53-56
A1L-D Biomedical Monitoring Circuits and Systems
- Tugba Kilic
Smart e-Patch for drugs monitoring in schizophrenia. 57-60 - Mio Tsukahara, Shintaro Izumi, Motofumi Nakanishi, Hiroshi Kawaguchi
A 15-μA metabolic equivalents monitoring system using adaptive acceleration sampling and normally off computing. 61-64 - Marius Schirmer, Francesca Stradolini, Sandro Carrara, Elisabetta Chicca
FPGA-based approach for automatic peak detection in cyclic voltammetry. 65-68 - Frederic Nabki
Towards chip scale components for optical coherence tomography. 69-72 - Zineb Benjelloun, Rémy Vauché, Wenceslas Rahajandraibe
Design of an energy detector for heartbeat localization in ECG signals. 73-76
A1L-E Neural Networks and Fuzzy Systems
- Richard George, Giacomo Indiveri:
Tunable device-mismatch effects for stochastic computation in analog/digital neuromorphic computing architectures. 77-80 - Amirali Amirsoleimani, Majid Ahmadi, Arash Ahmadi
Brain-inspired pattern classification with memristive neural network using the Hodgkin-Huxley neuron. 81-84 - Hiroomi Hikawa:
Improved winner-take-all circuit for neural network based on frequency-modulated signals. 85-88 - Ahmed Adel, Khaled Salah:
Model order reduction using artificial neural networks. 89-92 - Anastasios Psarras, Savvas Moisidis, Chrysostomos Nicopoulos
RapidLink: A network-on-chip architecture with double-data-rate links. 93-96
A2P-F Analog Circuits 1
- Rabih Kazma, Olivier Rossetto, Gilles Sicard:
Reducing quantization error in time measurement technique for SPAD readout circuit. 97-100 - Mohamed Megahed, Mohamed R. M. Rizk
12-Gb/s low-power voltage-mode driver for multi-standard serial-link applications. 101-104 - Vahideh Shirmohammadli
LDO-assisted vs. linear-assisted DC/DC converters: A comprehensive study and comparison. 105-108 - Giacomo Alberto Graceffa, Umberto Gatti, Cristiano Calligaro:
A 400 Mbps radiation hardened by design LVDS compliant driver and receiver. 109-112 - Masahiro Kano, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada:
Resonant power supply noise reduction using a triangular active charge injection. 113-116 - Giacomo Gervasoni, Marco Carminati, Giorgio Ferrari
FPGA-based lock-in amplifier with sub-ppm resolution working up to 6 MHz. 117-120
A2P-G Analog Circuits 2
- Riccardo Zurla
Enhanced voltage buffer compensation technique for two-stage CMOS operational amplifiers. 121-124 - Evgeny Pikhay, Yakov Roizin, Umberto Gatti, Cristiano Calligaro:
Re-usable 180nm CMOS dosimeter based on a floating gate device. 125-128 - Saeed Mehrjoo, Mohammad Taherzadeh-Sani
A 27 mV output ripple 92% efficiency buck converter using a multi-bit delta-sigma modulator controller and segmented output switch in 180 nm CMOS. 129-132 - Gönenç Berkol, Engin Afacan, Günhan Dündar
A hierarchical design automation concept for analog circuits. 133-136 - Hikmet Celiker
Noise analysis of current mode differential integrators. 137-140 - Bo Liu, Shigetoshi Nakatake, Bo Yang, Gong Chen:
Twin-row-style for MOS analog layout. 141-144
A2P-H RF Subsystems
- Sotoudeh Hamedi-Hagh:
Study of active inductors with suspendance analysis. 145-148 - Immanuel Raja
An inductor-less transmission line based 60 GHz PA in 65-nm CMOS with analog power control. 149-152 - Emad Elrifai, Marjorie Grzeskowiak
60 GHz stepped impedance filter using Planar Goubau line technology. 153-156 - Anthony Goavec, Rémy Vauché, Jean Gaubert, Frédéric Hameau, Mykhailo Zarudniev
Instantaneous frequency measurement for IR-UWB signal in CMOS 130 nm. 157-160
A2P-J Bioengineering, Sensors and Actuators
- Josef Magri, Ivan Grech, Owen Casha
Design of CMOS front-end circuitry for the acquisition of biopotential signals. 161-164 - Abdul Hafiz Alameh, Anoir Bouchami, Frederic Nabki
A wide voltage range charge pump in 0.13 μm CMOS for biasing of MEMS resonators. 165-168 - Naeeme Modir, Kyle Fricke, Zine-Eddine Abid, Robert Sobot:
Controlling and signal processing core for wireless implantable telemetry system. 169-172 - Leandro A. de Avila, Rafael Kunst
Energy efficiency evaluation of the pulse shapes and modulation techniques for IR-UWB in WBANs. 173-176 - Priscila C. Holanda, Cezar R. W. Reinbrecht, Guilherme Bontorin, Vitor V. Bandeira
DHyANA: A NoC-based neural network hardware architecture. 177-180 - Mustafa Berke Yelten:
A heuristic sensitivity analysis technique for high-dimensional systems. 181-184
A3L-A Green and Power Electronics
- Stefano Gregori
z-Domain analysis of Dickson charge pumps. 185-188 - Carlo Veri, Mirko Pasca, Giuseppe Tau, Stefano D'Amico:
A fully integrated switch capacitor step down DC-DC converter in 65nm bulk CMOS technology with peak efficiency tracking. 189-192 - Leandro B. Kehler, Antonio M. Kaminski, José R. Pinheiro
Auxiliary power supply for solid state transformers. 193-196 - Pasquale Napolitano, Kevin Kelliher, Basil Al Mukhtar, Diarmuid Carey, Owen Cregg:
An effective methodology for robust design of monolithic voltage regulators. 197-200 - Basil AlMukhtar, Paul Harriman, Kieran Burke:
The analysis of multi-phase current feedforward type-III constant on-time control with ultrafast load transient response for voltage regulator modules. 201-204
A3L-B Analog and Mixed Signals Circuits
- Reza Hashemian:
RC and RL to LC circuit conversion, and its application in poles and zeros identification. 205-208 - Joachim Becker, Jens Anders
A continuous-time field programmable analog array with 1 GHz GBW. 209-212 - Martin Kreißig, Mohammed El-Shennawy, Frank Ellinger:
A multi-modulus divider with high sensitivity and extended division range in 0.18 μm BiCMOS. 213-216 - Amin Aghighi, Abdul Hafiz Alameh, Mohammad Taherzadeh-Sani
A 10-Gb/s low-power low-voltage CTLE using gate and bulk driven transistors. 217-220 - Tamer Elfaramawy, Masoud Rezaei, Martin Morissette, Francois Lellouche, Benoit Gosselin
Ultra-low distortion linearized pseudo-RC low-pass filter. 221-224
A3L-C SS7. Advanced Concepts for Future RF and mmW Transceivers
- Raghavasimhan Thirunarayanan, Aravind Heragu, David Ruffieux, Christian C. Enz:
Ultra low-power MEMS based radios for the IoT. 225-228 - Shiva Jamali-Zavareh, Ramesh Harjani:
A jitter-resilient sampling technique for high-resolution ADCs in wideband RF receivers. 229-232 - Andre Prata, Rui Fiel Cordeiro, Daniel C. Dinis, Arnaldo S. R. Oliveira
All-digital transceivers - Recent advances and trends. 233-236 - Razvan-Cristian Marin, Antoine Frappé
Delta-sigma based digital transmitters with low-complexity embedded-FIR digital to RF mixing. 237-240 - Yoan Veyrac, Francois Rivet
Experimental demonstration of a Riemann Pump RF-DAC in 65 nm CMOS. 241-244
A3L-D Signal Processing
- Christian Schmidt
Digital signal splitting among multiple DACs for analog bandwidth interleaving (ABI). 245-248 - Sebastian Schmale, Pascal Seidel, Heiner Lange, Benjamin Knoop, Dagmar Peters-Drolshagen, Steffen Paul:
Efficient and fast SOP-based inpainting for neurological signals in resource limited systems. 249-252 - Roya Alizadeh, Yvon Savaria:
Performance analysis of a reduced complexity SCMA decoder exploiting a low-complexity maximum-likelihood approximation. 253-256 - Jochen Rust
High-performance bivariate numeric function approximation for hardware-efficient QR-decomposition. 257-260 - Guilherme Paim
A power-efficient imprecise radix-4 multiplier applied to high resolution audio processing. 261-264
A3L-E Digital Circuit Reliability
- Fabien Majéric, Eric Bourbao, Lilian Bossuet:
Electromagnetic security tests for SoC. 265-268 - Keisuke Inoue:
ECC module optimization for storage transient error-tolerant ASICs. 269-272 - Ghaith Kazma, Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria:
Investigating the efficiency and accuracy of a data type reduction technique for soft error analysis. 273-276 - Fábio B. Armelin, Lírida A. B. Naviner
Impact evaluation of logic blocks configuration on FPGA's soft error rate estimation. 277-280 - George Blanas, Haridimos T. Vergos:
Extending the viability of power signature - Based IP watermarking in the SoC era. 281-284
B1L-A SS6. Digitally Enhanced Mixed-Signal systems
- Harald Enzinger, Karl Freiberger, Gernot Kubin, Christian Vogel:
A survey of delay and gain correction methods for the indirect learning of digital predistorters. 285-288 - Siqi Wang, Mazen Abi-Hussein, Geneviève Baudoin
Comparison of hill-climbing and genetic algorithms for digital predistortion models sizing. 289-292 - Bryce Minger, Guillaume Ferré, Dominique Dallet, Loic Fuche:
A new approach for compensating memory nonlinear analog-to-digital converters using look-up tables. 293-296 - Han Le Duc, Chadi Jabbour, Patricia Desgreys, Van Tam Nguyen:
Estimation techniques for timing mismatch in time-interleaved analog-to-digital converters: Limitations and solutions. 297-300 - Reda Mohellebi, Chadi Jabbour, Baptiste Cecconi
A CMOS 65nm 120 dB Stacked A/D converters receiver for long wavelength radio astronomy observations. 301-304
B1L-B Sensing Electronics
- Davide Marano
Enhanced analytical model and output dynamic response of SiPM-Based electronic read-outs. 305-308 - Vincent Frick, Patrick Leveque
Integrated high-voltage CMOS mixed-signal instrumentation system for OFET-based gas sensor. 309-312 - Yosra Gargouri, Hervé Petit, Patrick Loumeau, Baptiste Cecconi
Compressed sensing for astrophysical signals. 313-316 - Costas Vastarouchas, Stavroula Kapoulea, Costas Psychalinos
ECG signal acquisition for the Pan-Tompkins algorithm using current-mirror filters. 317-320
B1L-C RF Circuits & Techniques
- Ramy Sharaf, Sherif Hekal, Anwer S. Abd El-Hameed
A new compact wireless power transfer system using C-shaped printed resonators. 321-323 - Anne-Sophie Royet, Jean-Philippe Michel, Bruno Reig, Jean-Louis Pornin, Manohiaina Ranaivoniarivo, Bruno Robain, Pierre de Person, Gregory Uren:
Design of optimized high Q inductors on SOI substrates for RF ICs. 324-327 - Gerardo Castellano, Davide De Caro, Antonio G. M. Strollo, Danilo Manstretta
A low power control system for real-time tuning of a hybrid transformer-based receiver. 328-331 - Luca Aluigi, Domenico Pepe, Domenico Zito:
K-band SiGe dual-input LNA and detector for SoC radiometers for remote sensing of atmosphere. 332-335
B1L-D Image and Video Processing Architectures
- Mehdi Abadi, Slavisa Jovanovic
A hardware configurable self-organizing map for real-time color quantization. 336-339 - Bianca Silveira, Guilherme Paim
Power-efficient sum of absolute differences architecture using adder compressors. 340-343 - Lívia Amaral, Guilherme Povala
Memory energy consumption analyzer for video encoder hardware architectures. 344-347 - Gustavo Sanchez
3D-HEVC depth maps intra prediction complexity analysis. 348-351 - Gustavo Sanchez
Real-time simplified edge detector architecture for 3D-HEVC depth maps coding. 352-355
B1L-E SS5. Data Centers: High Performance Systems, Elements & Algorithms
- Christos Spatharakis, Giannis Kanakis, Nikolaos Iliadis, Paraskevas Bakopoulos, Hercules Avramopoulos
A 56 Gbaud reconfigurable FPGA feed-forward equalizer for optical datacenter networks with flexible baudrate- and modulation-format. 356-359 - Nikos Iliadis, Giannis Kanakis, Nikolaos Argyris
Optical PAM-4 generation through polarization multiplexing in single-polarization single-mode VCSELs. 360-363 - Ioannis Patronas, Angelos Kyriakos, Dionysios I. Reisis:
Switching functions of a data center Top-of-Rack (ToR). 364-367 - Kostas Christodoulopoulos
Collisions free scheduling in the NEPHELE hybrid electrical/optical datacenter interconnect. 368-371 - Muzzamil Aziz, Amirreza Fazely Hamedani, Giada Landi, Domenico Gallico, Kostas Christodoulopoulos
SDN-enabled application-aware networking for data center networks. 372-375
B2P-F Embedded Systems
- Alen Bardizbanyan, Oskar Andersson
Logic filter cache for wide-VDD-range processors. 376-379 - Andre L. M. Martins, Anderson C. Sant'Ana, Fernando Gehm Moraes
Runtime energy management for many-core systems. 380-383 - Maurizio Rossi
Remote rehabilitation monitoring with an IoT-enabled embedded system for precise progress tracking. 384-387 - Osvaldo Navarro, Tim Leiding, Michael Hübner:
A dynamic cache reconfiguration platform for soft real-time systems. 388-391 - Nicolai Behmann, Christopher Seifert, Guillermo Payá Vayá, Holger Blume
Customized high performance low power processor for binaural speaker localization. 392-395 - Guilherme A. Madalozzo, Liana Dessandre Duenha, Rodolfo Azevedo
Scalability evaluation in many-core systems due to the memory organization. 396-399 - Themistoklis Melissaris, Iraklis Anagnostopoulos
Agora: Agent and market-based resource management for many-core systems. 400-403
B2P-G Emerging Secure Technologies
- Johanna Virkki, Toni Björninen
Strain reliability and substrate specific features of passive UHF RFID textile tag antennas. 404-407 - Rodrigo Cataldo, Guilherme Korol, Ramon Fernandes, Gustavo Sanchez
Evaluation of emerging TSV-enabled main memories on the PARSEC benchmark. 408-411 - Yahia Ouahab, Donatus Silva Richard, Rashid Rashidzadeh:
Secure scan chain using test port for tester authentication. 412-415
B2P-H PhD Students & Young Professionals Poster & Demo Session
- David Palomeque-Mangut
Comparative study of CMOS lock-in amplifiers for wideband bioelectrical impedance measurements. 416-419 - Nuraishah Sarimin, Rahma Abdaoui, Costin Anghel:
A 2-Gb/s 60 GHz transmission-gate based 130nm CMOS on-off keying modulator. 420-422 - Alejandro Von Chong
Pulse oximetry using a buried quad junction photodetector. 423-424 - Mohammed Bedier
A smart energy extraction interface for electrostatic vibrational energy harvester. 425-426 - Honggui Li, Maria Trocan, Carmona-G. Ricardo, Marco Trevisi:
A compressive domain saliency-based adaptive measurement method for image recovery. 427-428 - Pavel Morozkin, Marc Swynghedauw, Maria Trocan:
Image quality impact for eye tracking systems accuracy. 429-431 - Eric Lao, Marie-Minerve Louërat, Jean-Paul Chaput:
Semi-automated analog placement. 432-433 - Eugene Koskin:
Discrete-time modelling and experimental validation of an all-digital PLL for clock-generating networks. 434-435 - Eoghan O'Riordan, Elena Blokhina
Electromechanical coupling in electrostatic kinetic energy harvesters. 436-437 - André Ivanov, Peter Hallschmid, Zhonghua Zhou:
Local congestion and blockage aware routability analysis using adaptive flexible modeling. 438-439 - Alexandra L. Zimpeck, Ricardo Reis
Impact of variability effects on FinFET transistors and combinational cells. 440-441 - Johannes Wagner, Maurits Ortmanns:
Designing CT ΣΔ modulators with www.sigma-delta.de. 442 - Tamer Badran, Hassan Aboushady:
Delta-sigma modulator based spectrum sensing transceiver. 443
B3L-A Frequency Synthesis & Synchronization
- Mohammed El-Shennawy, Belal Al-Qudsi, Niko Joram, Frank Ellinger:
Fundamental limitations of phase noise on FMCW radar precision. 444-447 - Yann Donnelly
On the statistical properties of phase noise in Fractional-N frequency synthesizers using successive requantizers. 448-451 - Aidan Marnane, Valerio Marotta, Michael Peter Kennedy:
Yet another spur mechanism in a charge-pump based Fractional-N PLL. 452-455 - Aya G. Amer, Sameh A. Ibrahim
A 1-mW 12-GHz LC VCO in 65-nm CMOS technology. 456-459 - Markus Appel, Felix Wermke
Frequency synchronization for wireless networks using field programmable gate arrays. 460-463
B3L-B Sigma-Delta Converters
- Minh-Tien Nguyen, Chadi Jabbour, Van Tam Nguyen:
A continuous-time direct RF-to-digital ΔΣ receiver. 464-467 - Johannes Wagner, Stefan Reich, Rudolf Ritter, Jens Anders
Finite GBW in single OpAmp CT ΣΔ modulators. 468-471 - Hongjia Mo, Xiao Tan, Michael Peter Kennedy:
Maximizing the fundamental period of a dithered digital delta-sigma modulator with constant input. 472-475 - Jiazuo Chi, Rudolf Ritter, Johannes Wagner, Jens Anders
Phase noise vs. jitter analysis in continuous-time LP and BP ΣΔ modulators with interferers. 476-479 - Johannes Wagner, Jiazuo Chi, Maurits Ortmanns:
Designing CT ΣΔ modulators with shaped feedback waveforms using www.sigma-delta.de. 480-483
B3L-C SS3. Reconfigurable Circuits & Systems for Narrowband & Broadband Multistandards Applications
- Mohammed Adnan Addou, Ragheb Hijazi, Roberto Gómez-García
Two-branch channelized N-path filter for reconfigurable receiver. 484-487 - Ayssar Serhan, Pierre Ferris, Alexandre Giry:
Broadband SOI PA with tunable matching network for improved LTE performances under high VSWR. 488-491 - Francis Chan Wai Po, Rahma Abdaoui, Alexandre Giry:
Multi-band dual-mode antenna tunable matching network for broadband applications. 492-495 - Camilo Coelho, Yann Delomier, Dominique Dallet, Nathalie Deltimple, Eric Kerherve
Implementation and simulation of the impact of mixer phase mismatch in cartesian feedback linearization systems. 496-499
B3L-D Energy Harvesting
- Yin Li, Manjusri Misra, Stefano Gregori
Electrostatic energy harvester based on multiple variable capacitors. 500-503 - Janko Katic, Saul Rodriguez
An adaptive FET sizing technique for high efficiency thermoelectric harvesters. 504-507 - Pierre-Antoine Haddad
Efficient passive energy harvesters at 950 MHz and 2.45 GHz for 100 μW applications in 65 nm CMOS. 508-511 - Dominic A. Funke, Pierre Mayr, Lukas Straczek, John S. McCaskill, Jürgen Oehm
A 200 μm by 100 μm Smart Dust system with an average current consumption of 1.3 nA. 512-515
B3L-E Low Power Digital Circuits
- Mohammed Al-daloo
Energy efficient bootstrapped CMOS inverter for ultra-low power applications. 516-519 - Somayeh Timarchi, Massimo Alioto:
Ultra-low voltage standard cell libraries: Design strategies and a case study. 520-523 - Alberto Bosio, Patrick Girard, Arnaud Virazel:
Test of low power circuits: Issues and industrial practices. 524-527 - Fábio G. R. G. da Silva, Paulo F. Butzen
PVT variability analysis of FinFET and CMOS XOR circuits at 16nm. 528-531 - Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta Takagi
An low-energy 8T dual-port SRAM for image processor with selective sourceline drive scheme in 28-nm FD-SOI process technology. 532-535
C1L-A SS4. Issues and Trends Towards Resilient and Energy Efficient Embedded Electronic Systems
- Ali Ibrahim
Resiliency in nanometer CMOS systems: An overview. 536-539 - Jörg Henkel, Hussam Amrouch
Designing reliable, yet energy-efficient guardbands. 540-543 - Jose Tejada, Alberto Sanchez:
Ultra low power supply monitor system for embedded applications. 544-547 - Saurabh Jain, Massimo Alioto:
A closed-form energy model for VLSI circuits under wide voltage scaling. 548-551 - Giuseppe Tagliavini
Always-on motion detection with application-level error control on a near-threshold approximate computing platform. 552-555
C1L-B Noise and Variability Tolerant Design
- José L. Ausín
Analysis of non-idealities in parallel-summation logarithmic amplifiers. 556-559 - Raffaele Capoccia, Assim Boukhayma, Christian C. Enz:
Sub-electron CIS noise analysis in 65 nm process. 560-563 - Luc Hébrard, Duc Vinh Nguyen, Dorian Vogel, Jean-Baptiste Schell, Chrystelle Po, Norbert Dumas, Wilfried Uhring
On the influence of strong magnetic field on MOS transistors. 564-567 - Andreas Herkle, Markus Schuster, Joachim Becker, Maurits Ortmanns:
Enhanced Arbiter PUFs using custom sized structures for reduced noise sensitivity. 568-571 - Zhaopeng Wei, Yves Leduc, Gilles Jacquemod, Emeric de Foucauld:
UTBB-FDSOI complementary logic for high quality analog signal processing. 572-575
C1L-C High-speed Circuits & Techniques
- Dan Li, Zimou Zhang, Yang Xie, Ming Liu, Qian Yang, Li Geng:
A 25Gb/s low-noise optical receiver in 0.13 μm SiGe BiCMOS. 576-579 - Hermann Sohtsinda, Clency Perrine, Smail Bachir, Claude Duvanaud, Badreddin Koussa:
Impact of nonlinear power amplifier on the transmission of scalable multimedia contents. 580-583 - Klodjan Bidaj, Jean-Baptiste Bégueret, Jerome Deroo:
RJ/DJ jitter decomposition technique for high speed links. 584-587 - Pablo Perez-Nicoli, Fernando Silveira, Xun Zhang
Uplink wireless transmission overview in bi-directional VLC systems. 588-591 - Alexandru Amaricai, Sergiu Nimara, Oana Boncalo, Emanuel M. Popovici:
Reliability analysis of memory centric LDPC decoders under probabilistic storage failures. 592-595
C1L-D Nonlinear Circuits and Systems
- Vijay K. Yadav
Nonlinear synchronization of fractional-order Lu and Qi chaotic systems. 596-599 - Laura Conesa-Peraleja, Susana Patón
Signal boosting to extend the bandwidth of oversampled converters. 600-603 - Dalibor Biolek
Memristors and other higher-order elements in generalized through-across domain. 604-607 - Miao Qi, Hanyu Wang, Bo Wang:
Predicting the oscillation condition of memristor-based oscillators using Hopf bifurcation theory. 608-611 - Dawei Mai, Hongjia Mo, Michael Peter Kennedy:
Comments on "folding of phase noise spectra in charge-pump phase-locked loops induced by frequency division". 612-615
C1L-E CAD and Optimization
- Marcelo Ruaro
A data extraction and debugging framework for large-scale MPSoCs. 616-619 - Mateus Fogaça
Quadratic timing objectives for incremental timing-driven placement optimization. 620-623 - Renan Netto, Chrystian Guth, Vinicius S. Livramento, Márcio Castro
Exploiting parallelism to speed up circuit legalization. 624-627 - Marcelo Linck, Gabriel Paz, Augusto Santos, César A. M. Marcon
Software-based mechanism for Network-on-Chip performance increase. 628-631
C2P-F VLSI
- Rafael Goncalves Mota, Jarbas Silveira
Efficient routing table minimization for fault-tolerant irregular Network-on-Chip. 632-635 - Arefeh Soltani, Roozbeh Abdollahi, Sarang Kazeminia
Programmable incrementing/decrementing binary accumulator for high-speed calibration loops. 636-639 - Guilherme A. Madalozzo, Leandro Soares Indrusiak
Mapping of real-time applications on a packet switching NoC-based MPSoC. 640-643 - Ali Badiey, Reza Papi, Navid Rahmanikia
Single-ended impedance-modulation equalization for low-power differential voltage-mode drivers. 644-647 - Jin-Tai Yan, Meng-Tian Chen, Chia-Heng Yen:
Cell-aware MBFF utilization for clock power reduction. 648-651 - Carlos Henrique Menezes Oliveira, Matheus T. Moreira, Ricardo A. Guazzelli, Ney Laert Vilar Calazans
ASCEnD-FreePDK45: An open source standard cell library for asynchronous design. 652-655
C2P-G Green and Harvesting Energy
- Natasa Mitrovic, Reinhard Enne, Horst Zimmermann
An integrated current sensing circuit with comparator function for a buck DC-DC converter in HV-CMOS. 656-659 - Ivan Stoychev, Jürgen Oehm
Advanced electronic circuit breaker techniques for the use in electric vehicle charging stations. 660-663 - Mohamed Mokhles Mnif, Hassène Mnif, Mourad Loulou:
New design of RF-DC rectifier circuit for radio frequency energy harvesting. 664-667 - Yuqing Xu, Delong Shang, Fei Xia, Alex Yakovlev:
A smart all-digital charge to digital converter. 668-671 - Amr A. Adly
Utilizing electromechanical energy harvesting in vehicle suspension vibration damping. 672-675
C2P-H Signal Processing Circuits
- Hermann Sohtsinda, Smail Bachir, Clency Perrine, Claude Duvanaud:
An evaluation of hybrid tone reservation method for PAPR reduction using power amplifier with memory effects. 676-679 - Cosmin Popa:
Low-power low-voltage CMOS analog signal processing circuits using a functional core. 680-683
C2P-J RF Techniques
- Zied Koubaa, Mohamed Ali
Amplitude demodulation based on synchronized sampling by a PLL circuit. 684-687 - Hazal Yüksel, Dong Yang, Zachariah Boynton, Emory Enroth, Thomas Tapen, Alyosha C. Molnar, Alyssa B. Apsel:
Broadly tunable frequency division duplex transceiver: Theory and operation. 688-691 - Mathieu Coumba Faye, Emmanuel Bergeret
Power optimized reading procedure for RFID (EPC Gen 2) data transmission enabled application: Example of a wireless temperature sensor. 692-695
C2P-K Image and Video Processing
- Ronan Boitard, Mahsa T. Pourazad, Panos Nasiopoulos:
Evaluation of chroma subsampling for high dynamic range video compression. 696-699 - Gian Domenico Licciardo
Application specific image processor for the extension of the dynamic range of images with multiple resolutions. 700-703 - Ismael Seidel, José Luís Güntzel, Luciano Volcan Agostini
Coarse grain partial distortion elimination for Hadamard ME in HEVC. 704-707 - Jorge Soto Leon, Carlos Silva Cárdenas
A highly parallel 4K real-time HEVC fractional motion estimation architecture for FPGA implementation. 708-711
C3L-A Embedded Systems Architecture
- Geancarlo Abich
Extending FreeRTOS to support dynamic and distributed mapping in multiprocessor systems. 712-715 - Jorge González
Architecting a computer with a full optical RAM. 716-719 - Marius Marcu
An investigation on FPGA based energy profiling of multi-core embedded architectures. 720-723 - Jiacong He, Joseph Callenes-Sloan:
Reducing the energy of a large hybrid cache. 724-727
C3L-B Analog Functional Blocks
- Davide Marano
A 0.003-mm2 50-mW three-stage amplifier driving 10-nF with 2.7-MHz GBW. 728-731 - Riccardo Zurla
Bandwidth optimization of CMOS two-stage operational amplifiers under power consumption and area constraints. 732-735 - Mohammad Tohidi, Jens Kargaard Madsen, Martijn J. R. Heck, Farshad Moradi
Low-power comparator in 65-nm CMOS with reduced delay time. 736-739 - Pinar Basak Basyurt, Edoardo Bonizzoni, Franco Maloberti, Devrim Yilmaz Aksin:
Design of a compact and low supply voltage CMOS voltage reference generator. 740-743
C3L-C SS8. Electronic Interfaces of Heterogeneous Miniatures Systems for Smart Autonomous Sensors
- Elena Blokhina
Towards autonomous microscale systems: Progress in electrostatic kinetic energy harvesting. 744-747 - Younus Syed, Bharat G. Hegde, T. V. Prabhakar, M. Manjunath, K. J. Vinoy:
RF energy harvesting chip powered sensor node. 748-751 - Arantxa Uranga
Design of self-sustained CMOS amplifiers for all-CMOS MEMS based oscillators. 752-755 - Pierre Prache, Pietro Maris Ferreira, Núria Barniol
Monolithic integration of mutually injection-locked CMOS-MEMS oscillators for differential resonant sensing applications. 756-759 - John Nicot
Remote RF powering of ambient sensors. 760-763
C3L-E Design and Test
- Mehran Mozaffari Kermani
Lightweight hardware architectures for fault diagnosis schemes of efficiently-maskable cryptographic substitution boxes. 764-767 - Anita Aghaie, Mehran Mozaffari Kermani
Fault diagnosis schemes for secure lightweight cryptographic block cipher RECTANGLE benchmarked on FPGA. 768-771 - Stefanos Valadimas, Angela Arapoyanni, Yiorgos Tsiatouhas
Timing error mitigation in microprocessor cores. 772-775 - Ghazanfar Ali, Ahmed Badawy, Hans G. Kerkhoff:
Accessing on-chip temperature health monitors using the IEEE 1687 standard. 776-779 - Dieison Soares Silveira
System energy analysis for shared memory multiprocessing applications. 780-783
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