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Yan Ying
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2010 – 2019
- 2014
- [j2]Zhiyi Yu, Ruijin Xiao, Kaidi You, Heng Quan, Peng Ou, Zheng Yu, Maofei He, Jiajie Zhang, Yan Ying, Haofan Yang, Jun Han, Xu Cheng, Zhang Zhang, Ming-e Jing, Xiaoyang Zeng:
A 16-Core Processor With Shared-Memory and Message-Passing Communications. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(4): 1081-1094 (2014) - 2012
- [c4]Yan Ying, Kaidi You, Liyang Zhou, Heng Quan, Ming-e Jing, Zhiyi Yu, Xiaoyang Zeng:
A pure software ldpc decoder on a multi-core processor platform with reduced inter-processor communication cost. ISCAS 2012: 2609-2612 - [c3]Zhiyi Yu, Kaidi You, Ruijin Xiao, Heng Quan, Peng Ou, Yan Ying, Haofan Yang, Ming-e Jing, Xiaoyang Zeng:
An 800MHz 320mW 16-core processor with message-passing and shared-memory inter-core communication mechanisms. ISSCC 2012: 64-66 - 2011
- [c2]Dan Bao, Chuan Wu, Yan Ying, Yun Chen, Xiaoyang Zeng:
A 4.32 mm2 170mW LDPC decoder in 0.13μm CMOS for WiMax/Wi-Fi applications. ASP-DAC 2011: 77-78 - 2010
- [j1]Yan Ying, Dan Bao, Zhiyi Yu, Xiaoyang Zeng, Yun Chen:
A Cost-Efficient LDPC Decoder for DVB-S2 with the Solution to Address Conflict Issue. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(8): 1415-1424 (2010) - [c1]Zewen Shi, Kaidi You, Yan Ying, Bei Huang, Xiaoyang Zeng, Zhiyi Yu:
A scalable and fault-tolerant routing algorithm for NoCs. ISCAS 2010: 165-168
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