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Didier Demigny
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2010 – 2019
- 2010
- [j6]Ludovic Devaux, Sana Ben Sassi, Sébastien Pillement, Daniel Chillet, Didier Demigny:
Flexible Interconnection Network for Dynamically and Partially Reconfigurable Architectures. Int. J. Reconfigurable Comput. 2010: 390545:1-390545:15 (2010) - [c20]Hung-Manh Pham, Sébastien Pillement, Didier Demigny:
Evaluation of Fault-Mitigation Schemes for Fault-Tolerant Dynamic MPSoC. FPL 2010: 159-162 - [c19]Ludovic Devaux, Sébastien Pillement, Daniel Chillet, Didier Demigny:
R2NoC: Dynamically Reconfigurable Routers for Flexible Networks on Chip. ReConFig 2010: 376-381 - [c18]Ludovic Devaux, Sébastien Pillement, Daniel Chillet, Didier Demigny:
Mesh and Fat-Tree comparison for dynamically reconfigurable applications. ReCoSoC 2010: 157-160
2000 – 2009
- 2009
- [c17]Maroun Ojail, Raphaël David, Stéphane Chevobbe, Didier Demigny:
Reconfiguration Level Analysis of FFT / FIR Units in Wireless Telecommunication Systems. DSD 2009: 575-581 - [c16]Maroun Ojail, Raphaël David, Stéphane Chevobbe, Didier Demigny:
A reconfigurable FIR/FFT unit for wireless telecommunication systems. FPL 2009: 645-648 - [c15]Hung-Manh Pham, Sébastien Pillement, Didier Demigny:
A Fault-Tolerant Layer for Dynamically Reconfigurable Multi-processor System-on-Chip. ReConFig 2009: 284-289 - 2008
- [j5]Lounis Kessal, Nicolas Abel, Si Mahmoud Karabernou, Didier Demigny:
Reconfigurable computing: design methodology and hardware tasks scheduling for real-time image processing. J. Real Time Image Process. 3(3): 131-147 (2008) - 2006
- [c14]Nicolas Abel, Lounis Kessal, Sébastien Pillement, Didier Demigny:
Clear Stream towards Dynamically Reconfigurable Systems on Chip. ReCoSoC 2006: 98-104 - 2005
- [j4]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny:
Méthode de caractérisation des architectures d'accélérateurs flexibles pour systèmes sur puce. Tech. Sci. Informatiques 24(6): 725-755 (2005) - 2004
- [c13]Nicolas Abel, Lounis Kessal, Didier Demigny:
Design flexibility using fpga dynamical reconfiguration. ICIP 2004: 2821-2824 - [c12]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon:
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. SAMOS 2004: 128-137 - 2003
- [j3]Lounis Kessal, Nicolas Abel, Didier Demigny:
Real-time image processing with dynamically reconfigurable architecture. Real Time Imaging 9(5): 297-313 (2003) - [c11]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny:
A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring. FPL 2003: 722-732 - [c10]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon:
Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability. IPDPS 2003: 176 - 2002
- [j2]Didier Demigny:
On optimal linear filtering for edge detection. IEEE Trans. Image Process. 11(7): 728-737 (2002) - 2001
- [c9]P. Lamaty, B. Mazar, Didier Demigny, Lounis Kessal, Si Mahmoud Karabernou:
Two ASIC for Low and Middle Levels of Real Time Image Processing. VLSI-SOC 2001: 3-14 - [c8]Didier Demigny, Lounis Kessal, J. Pons:
Fast Recursive Implementation of the Gaussian Filter. VLSI-SOC 2001: 39-49 - [c7]Lounis Kessal, R. Bourguiba, Didier Demigny, N. Boudouani, Si Mahmoud Karabernou:
Reconfigurable Architecture Using High Speed FPGA. VLSI-SOC 2001: 75-86 - 2000
- [c6]Didier Demigny, Lounis Kessal, R. Bourguiba, N. Boudouani:
How to Use High Speed Reconfigurable FPGA for Real Time Image Processing? CAMP 2000: 240- - [c5]Lounis Kessal, Didier Demigny, N. Boudouani, R. Bourguiba:
Reconfigurable Hardware for Real Time Image Processing. ICIP 2000: 110-113
1990 – 1999
- 1998
- [c4]Didier Demigny:
Extension of Canny's Discrete Criteria to Second Derivative Filters Towards a Unified Approach. ICIP (2) 1998: 520-524 - 1997
- [j1]Didier Demigny, Tawfik Kamlé:
A Discrete Expression of Canny's Criteria for Step Edge Detector Performances Evaluation. IEEE Trans. Pattern Anal. Mach. Intell. 19(11): 1199-1211 (1997) - [c3]F. G. Lorca, Lounis Kessal, Didier Demigny:
Efficient ASIC and FPGA Implementations of IIR Filters for Real Time Edge Detection. ICIP (2) 1997: 406-409 - 1996
- [c2]Didier Demigny, Si Mahmoud Karabernou:
An effective resolution definition or how to choose an edge detector, its scale parameter and the threshold? ICIP (1) 1996: 829-832 - 1995
- [c1]Didier Demigny, F. G. Lorca, Lounis Kessal:
Evaluation of edge detectors performances with a discrete expression of Canny's criteria. ICIP 1995: 169-172
Coauthor Index
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