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Robert Szczygiel
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2020 – today
- 2024
- [c27]Mateusz Wygrzywalski, Robert Szczygiel:
Lightweight Extension of RISC-V Core for NTT-like Algorithms: (PhD Forum Paper). ASAP 2024: 241-242 - [c26]Mateusz Wygrzvwalski, Pawel Skrzypiec, Robert Szczygiel:
Hardware Acceleration Method Using RISC-V Core with No ISA Extensions. MIXDES 2024: 265-269 - 2023
- [j4]Rafal Kleczek
, Piotr Kmon
Single Photon Counting Readout IC With 44 e- rms ENC and 5.5 e- rms Offset Spread With Charge Sensitive Amplifier Active Feedback Discharge. IEEE Trans. Circuits Syst. I Regul. Pap. 70(5): 1882-1892 (2023) - 2021
- [j3]Matti Kauppinen
Characterization of Seamless CdTe Photon Counting X-Ray Detector. IEEE Trans. Instrum. Meas. 70: 1-11 (2021) - [c25]Pawel Skrzypiec
Development of On-Chip Calibration for Hybrid Pixel Detectors. DDECS 2021: 133-136 - [c24]Pawel Grybos
Hybrid Detector with Interpixel Communication for Color X-ray Imaging. ICECS 2021: 1-4
2010 – 2019
- 2019
- [c23]Rafal Kleczek
SPC Pixel IC with 9.4 e- rms Offset Spread, 60 e- rms ENC and 70 kfps Frame Rate. ESSCIRC 2019: 85-88 - 2018
- [j2]Rafal Kleczek
Single Photon-Counting Pixel Readout Chip Operating Up to 1.2 Gcps/mm2 for Digital X-Ray Imaging Systems. IEEE J. Solid State Circuits 53(9): 2651-2662 (2018) - [c22]Bartosz Tutro, Kacper Urbanski, Robert Szczygiel
Design of Matrix Controller for Hybrid Pixel Detectors. MIXDES 2018: 140-144 - [c21]Piotr Otfinowski
Multithreshold Pattern Recognition Algorithm for Charge Sharing Compensation in Hybrid Pixel Detectors. MIXDES 2018: 173-177 - 2017
- [c20]Krzysztof Kasinski
Microstrip and gas electron multiplier readout ASIC for physics experiment at FAIR. MIXDES 2017: 285-289 - [c19]Piotr Maj
Single photon counting integrated circuit operating with CdTe pixel detector. MIXDES 2017: 324-327 - 2015
- [c18]Pawel Grybos
32k Channels readout IC for single photon counting detectors with 75 μm pitch, ENC of 123 e- rms, 9 e- rms offset spread and 2% rms gain spread. BioCAS 2015: 1-4 - [c17]Pawel Grybos
Digitally assisted low noise and fast signal processing charge sensitive amplifier for single photon counting systems. ICIT 2015: 1445-1450 - [c16]Rafal Kleczek
Charge sensitive amplifier for nanoseconds pulse processing time in CMOS 40 nm technology. MIXDES 2015: 292-296 - [c15]Piotr Kmon
Design for the testability of the multichannel neural recording and stimulating integrated circuit. MIXDES 2015: 305-308 - [c14]Krzysztof Kasinski
Noise optimization of the time and energy measuring ASIC for silicon tracking system. MIXDES 2015: 490-495 - [c13]Aleksandra Krzyzanowska
Methodology of automation process of wafer tests. MIXDES 2015: 530-533 - 2014
- [c12]Piotr Kmon
Effective noise minimization in multichannel recording circuits processed in modern technologies for neurobiology experiments. BioCAS 2014: 344-347 - [c11]Piotr Otfinowski
ADCs in deep submicron technologies for ASICs of pixel architecture. DDECS 2014: 278-281 - [c10]Piotr Maj
23552-channel IC for single photon counting pixel detectors with 75 µm pitch, ENC of 89 e- rms, 19 e- rms offset spread and 3% rms gain spread. ESSCIRC 2014: 147-150 - [c9]Pawel Grybos
Ultra fast X-ray detection systems in nanometer and 3D technologies. MIXDES 2014: 38-41 - [c8]Miroslaw Zoladz, Piotr Kmon
Design of system-on-chip in 180 nm technology for multi-channel wireless recording of the nerve tissue electrical activity. MIXDES 2014: 267-271 - 2013
- [c7]Krzysztof Kasinski, Rafal Kleczek, Pawel Grybos, Robert Szczygiel:
Dual stage charge-sensitive amplifier with constant-current feedback for Time-over-Threshold processing dedicated for silicon strip detectors. MIXDES 2013: 239-242 - [c6]Piotr Maj
FPGA Simulations of Charge Sharing Effect Compensation Algorithms for Implementation in Deep Sub-Micron Technologies. UKSim 2013: 780-786 - 2012
- [c5]Miroslaw Zoladz, Piotr Kmon
Design and measurements of low power multichannel chip for recording and stimulation of neural activity. EMBC 2012: 4470-4474 - 2011
- [c4]Piotr Kmon, Pawel Grybos
Tuning the low cut-off frequency in multichannel neural recording amplifiers by the on-chip correction DACs. ECCTD 2011: 302-305 - [c3]Piotr Maj
Development of a fast readout chip in deep submicron technology for pixel hybrid detectors. ECCTD 2011: 409-412 - [c2]Piotr Kmon, Miroslaw Zoladz, Pawel Grybos
Comparision of two different architectures of multichannel readout ASICs for neurobiological experiments. EUROCON 2011: 1-4 - [c1]Robert Szczygiel
A low noise, Fast Pixel Readout IC working in single photon counting mode with energy window selection in 90 nm CMOS. ISCAS 2011: 1415-1418
2000 – 2009
- 2002
- [j1]Pawel Grybos, Wladyslaw Dabrowski, Pawel Hottowy, Robert Szczygiel
Multichannel mixed-mode IC for digital readout of silicon strip detectors. Microelectron. Reliab. 42(3): 427-436 (2002)
Coauthor Index
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