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Te-Hsuan Chen
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2010 – 2019
- 2019
- [j2]Te-Hsuan Chen, John P. Hayes:
Equivalence Among Stochastic Logic Circuits and its Application to Synthesis. IEEE Trans. Emerg. Top. Comput. 7(1): 67-79 (2019) - 2017
- [c6]Te-Hsuan Chen, Pai-Shun Ting, John P. Hayes:
Achieving progressive precision in stochastic computing. GlobalSIP 2017: 1320-1324 - 2016
- [b1]Te-Hsuan Chen:
Designing Accurate and Low-Cost Stochastic Circuits. University of Michigan, USA, 2016 - [c5]Te-Hsuan Chen, John P. Hayes:
Design of Division Circuits for Stochastic Computing. ISVLSI 2016: 116-121 - [i1]Te-Hsuan Chen, Ju-Yi Lu:
Hardware Acceleration for Boolean Satisfiability Solver by Applying Belief Propagation Algorithm. CoRR abs/1603.05314 (2016) - 2015
- [c4]Te-Hsuan Chen, John P. Hayes:
Equivalence among stochastic logic circuits and its application. DAC 2015: 131:1-131:6 - 2014
- [j1]Te-Hsuan Chen, Armin Alaghi, John P. Hayes:
Behavior of stochastic circuits under severe error conditions. it Inf. Technol. 56(4): 182-191 (2014) - [c3]Te-Hsuan Chen, John P. Hayes:
Analyzing and controlling accuracy in stochastic circuits. ICCD 2014: 367-373 - 2013
- [c2]Te-Hsuan Chen, John P. Hayes:
Design of stochastic Viterbi decoders for convolutional codes. DDECS 2013: 66-71
2000 – 2009
- 2009
- [c1]Te-Hsuan Chen, Yu-Ying Hsiao, Yu-Tsao Hsing, Cheng-Wen Wu:
An Adaptive-Rate Error Correction Scheme for NAND Flash Memory. VTS 2009: 53-58
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