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Ningyi Xu
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2020 – today
- 2024
- [j15]Wenjie Li
, Aokun Hu
CoDA: A Co-Design Framework for Versatile and Efficient Attention Accelerators. IEEE Trans. Computers 73(8): 1924-1938 (2024) - [j14]Wenjie Li
A Precision-Scalable Deep Neural Network Accelerator With Activation Sparsity Exploitation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1): 263-276 (2024) - [j13]Jinming Zhang
INDM: Chiplet-Based Interconnect Network and Dataflow Mapping for DNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(4): 1107-1120 (2024) - [j12]Wenjie Li
Quantization and Hardware Architecture Co-Design for Matrix-Vector Multiplications of Large Language Models. IEEE Trans. Circuits Syst. I Regul. Pap. 71(6): 2858-2871 (2024) - [j11]Jinming Zhang
M2M: A Fine-Grained Mapping Framework to Accelerate Multiple DNNs on a Multi-Chiplet Architecture. IEEE Trans. Very Large Scale Integr. Syst. 32(10): 1864-1877 (2024) - [c43]Yijia Zhang, Sicheng Zhang, Shijie Cao, Dayou Du, Jianyu Wei, Ting Cao, Ningyi Xu:
AFPQ: Asymmetric Floating Point Quantization for LLMs. ACL (Findings) 2024: 28-36 - [c42]Dayou Du, Yijia Zhang, Shijie Cao, Jiaqi Guo, Ting Cao, Xiaowen Chu, Ningyi Xu:
BitDistiller: Unleashing the Potential of Sub-4-Bit LLMs via Self-Distillation. ACL (1) 2024: 102-116 - [c41]Zihao Liu, Xiaoyu Zhang
Leveraging Enhanced Queries of Point Sets for Vectorized Map Construction. ECCV (57) 2024: 461-477 - [c40]Yijia Zhang, Lingran Zhao, Shijie Cao, Sicheng Zhang, Wenqiang Wang, Ting Cao, Fan Yang, Mao Yang, Shanghang Zhang, Ningyi Xu:
Integer or Floating Point? New Outlooks for Low-Bit Quantization on Large Language Models. ICME 2024: 1-6 - [i10]Dayou Du, Yijia Zhang, Shijie Cao, Jiaqi Guo, Ting Cao, Xiaowen Chu, Ningyi Xu:
BitDistiller: Unleashing the Potential of Sub-4-Bit LLMs via Self-Distillation. CoRR abs/2402.10631 (2024) - [i9]Zihao Liu, Xiaoyu Zhang, Guangwei Liu, Ji Zhao, Ningyi Xu:
Leveraging Enhanced Queries of Point Sets for Vectorized Map Construction. CoRR abs/2402.17430 (2024) - [i8]Shaoting Zhu, Derun Li, Yong Liu, Ningyi Xu, Hang Zhao:
Cross Anything: General Quadruped Robot Navigation through Complex Terrains. CoRR abs/2407.16412 (2024) - [i7]Xiaoyu Zhang, Guangwei Liu, Zihao Liu, Ningyi Xu, Yunhui Liu, Ji Zhao:
Enhancing Vectorized Map Perception with Historical Rasterized Maps. CoRR abs/2409.00620 (2024) - [i6]Jinhao Li, Shan Huang, Jiaming Xu, Jun Liu, Li Ding, Ningyi Xu, Guohao Dai:
MARCA: Mamba Accelerator with ReConfigurable Architecture. CoRR abs/2409.11440 (2024) - 2023
- [j10]Ye Liu
NVP: A Flexible and Efficient Processor Architecture for Accelerating Diverse Computer Vision Tasks including DNN. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 271-275 (2023) - [j9]Wenjie Li
Low-Complexity Precision-Scalable Multiply-Accumulate Unit Architectures for Deep Neural Network Accelerators. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1610-1614 (2023) - [c39]Dongxu Lyu
FLNA: An Energy-Efficient Point Cloud Feature Learning Accelerator with Dataflow Decoupling. DAC 2023: 1-6 - [c38]Zhican Wang, Gang Wang, Honglan Jiang, Ningyi Xu, Guanghui He:
COSA:Co-Operative Systolic Arrays for Multi-head Attention Mechanism in Neural Network using Hybrid Data Reuse and Fusion Methodologies. DAC 2023: 1-6 - [c37]Yijia Zhang, Yibo Han, Shijie Cao, Guohao Dai, Youshan Miao, Ting Cao, Fan Yang, Ningyi Xu:
Adam Accumulation to Reduce Memory Footprints of Both Activations and Gradients for Large-Scale DNN Training. ECAI 2023: 3058-3065 - [c36]Yaoxiu Lian, Xinhao Yang, Ke Hong, Yu Wang, Guohao Dai, Ningyi Xu:
A Point Transformer Accelerator with Fine-Grained Pipelines and Distribution-Aware Dynamic FPS. ICCAD 2023: 1-9 - [c35]Dongxu Lyu
SpOctA: A 3D Sparse Convolution Accelerator with Octree-Encoding-Based Map Search and Inherent Sparsity-Aware Processing. ICCAD 2023: 1-9 - [c34]Ke Hong, Zhongming Yu, Guohao Dai, Xinhao Yang, Yaoxiu Lian, Zehao Liu, Ningyi Xu, Yuhan Dong, Yu Wang:
Exploiting Hardware Utilization and Adaptive Dataflow for Efficient Sparse Convolution in 3D Point Clouds. MLSys 2023 - [c33]Weijie Luo
History-Detr: Optimize Query Initialization Strategy by Using Historical Information and Kinematics. MMAsia 2023: 4:1-4:7 - [i5]Yijia Zhang, Lingran Zhao, Shijie Cao, Wenqiang Wang, Ting Cao, Fan Yang, Mao Yang, Shanghang Zhang, Ningyi Xu:
Integer or Floating Point? New Outlooks for Low-Bit Quantization on Large Language Models. CoRR abs/2305.12356 (2023) - [i4]Yijia Zhang, Yibo Han, Shijie Cao, Guohao Dai, Youshan Miao, Ting Cao, Fan Yang, Ningyi Xu:
Adam Accumulation to Reduce Memory Footprints of both Activations and Gradients for Large-scale DNN Training. CoRR abs/2305.19982 (2023) - [i3]Dongxu Lyu, Zhenyu Li, Yuzhou Chen, Jinming Zhang, Ningyi Xu, Guanghui He:
SpOctA: A 3D Sparse Convolution Accelerator with Octree-Encoding-Based Map Search and Inherent Sparsity-Aware Processing. CoRR abs/2308.09249 (2023) - [i2]Qiao Sun, Shiduo Zhang, Danjiao Ma, Jingzhe Shi, Derun Li, Simian Luo, Yu Wang, Ningyi Xu, Guangzhi Cao, Hang Zhao:
Large Trajectory Models are Scalable Motion Predictors and Planners. CoRR abs/2310.19620 (2023) - [i1]Yijia Zhang, Sicheng Zhang, Shijie Cao, Dayou Du, Jianyu Wei, Ting Cao, Ningyi Xu:
AFPQ: Asymmetric Floating Point Quantization for LLMs. CoRR abs/2311.01792 (2023) - 2022
- [j8]Wenjie Li
Efficient Compression Methods for Wire-Spread-Based Stochastic Computing Deep Neural Networks. IEEE Trans. Circuits Syst. II Express Briefs 69(11): 4538-4542 (2022) - 2021
- [c32]Xi Fan, Xuyan Wang, Yaoyao Ye, Xianglun Leng, Ningyi Xu, Guanghui He:
CCASM: A Computation- and Communication-Aware Scheduling and Mapping Algorithm for NoC-Based DNN Accelerators. ASICON 2021: 1-4 - [c31]Jinming Zhang
A Low-Latency FPGA Implementation for Real-Time Object Detection. ISCAS 2021: 1-5 - 2020
- [j7]Mingxuan Li, Yue Wang, Yonghui Liu
Enhanced Power Decoupling Strategy for Virtual Synchronous Generator. IEEE Access 8: 73601-73613 (2020) - [j6]Yijin Guan
Crane: Mitigating Accelerator Under-utilization Caused by Sparsity Irregularities in CNNs. IEEE Trans. Computers 69(7): 931-943 (2020)
2010 – 2019
- 2019
- [j5]Shijie Cao, Lanshun Nie, De-chen Zhan, Wenqiang Wang, Ningyi Xu, Ramashis Das, Ming Wu, Lintao Zhang, Derek Chiou:
FlexSaaS: A Reconfigurable Accelerator for Web Search Selection. ACM Trans. Reconfigurable Technol. Syst. 12(1): 5:1-5:20 (2019) - 2017
- [c30]Yijin Guan, Ningyi Xu, Chen Zhang
Using Data Compression for Optimizing FPGA-Based Convolutional Neural Network Accelerators. APPT 2017: 14-26 - [c29]Jiansong Zhang, Yongqiang Xiong, Ningyi Xu, Ran Shu, Bojie Li, Peng Cheng, Guo Chen, Thomas Moscibroda:
The Feniks FPGA Operating System for Cloud Computing. APSys 2017: 22:1-22:7 - [c28]Yijin Guan, Hao Liang, Ningyi Xu, Wenqiang Wang, Shaoshuai Shi, Xi Chen, Guangyu Sun, Wei Zhang, Jason Cong:
FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates. FCCM 2017: 152-159 - [c27]Guohao Dai, Tianhao Huang, Yuze Chi, Ningyi Xu, Yu Wang, Huazhong Yang:
ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture. FPGA 2017: 217-226 - [c26]Xi Chen, Xiaolin Hu, Hucheng Zhou, Ningyi Xu:
FxpNet: Training a deep convolutional neural network in fixed-point representation. IJCNN 2017: 2494-2501 - 2016
- [c25]Jiantao Qiu, Jie Wang, Song Yao, Kaiyuan Guo, Boxun Li, Erjin Zhou, Jincheng Yu, Tianqi Tang, Ningyi Xu, Sen Song, Yu Wang, Huazhong Yang:
Going Deeper with Embedded FPGA Platform for Convolutional Neural Network. FPGA 2016: 26-35 - [c24]Bojie Li, Kun Tan, Layong Larry Luo, Yanqing Peng
ClickNP: Highly flexible and High-performance Network Processing with Reconfigurable Hardware. SIGCOMM 2016: 1-14 - 2015
- [j4]Wenqiang Wang, Jing Yan, Ningyi Xu, Yu Wang, Feng-Hsiung Hsu:
Real-Time High-Quality Stereo Vision System in FPGA. IEEE Trans. Circuits Syst. Video Technol. 25(10): 1696-1708 (2015) - 2014
- [c23]Yu Wang, Boxun Li, Rong Luo, Yiran Chen, Ningyi Xu, Huazhong Yang:
Energy efficient neural networks for big data analytics. DATE 2014: 1-2 - [c22]Boxun Li, Erjin Zhou, Bo Huang, Jiayi Duan, Yu Wang
Large scale recurrent neural network on GPU. IJCNN 2014: 4062-4069 - 2013
- [c21]Wenqiang Wang, Jing Yan, Ning-Yi Xu, Yu Wang, Feng-Hsiung Hsu:
Real-time high-quality stereo vision system in FPGA. FPT 2013: 358-361 - 2012
- [c20]Jing Yan, Zhanxiang Zhao, Ning-Yi Xu, Xi Jin, Lin-Tao Zhang, Feng-Hsiung Hsu:
Efficient Query Processing for Web Search Engine with FPGAs. FCCM 2012: 97-100 - [c19]Huiling Chen, Guoqing Zhao
The Analysis of Research Hotspots and Fronts of Knowledge Visualization Based on CiteSpace II. ICHL 2012: 57-68 - [c18]Ningyi Xu, Guoqing Zhao
The Colored Concept Map and Its Application in Learning Assistance Program. ICHL 2012: 198-209 - [c17]Mo Xu, Xiaorui Zhang, Yu Wang
Probabilistic Brain Fiber Tractography on GPUs. IPDPS Workshops 2012: 742-751 - 2011
- [j3]Jing Yan, Ning-Yi Xu, Xiongfei Cai, Rui Gao, Yu Wang
An FPGA-based accelerator for LambdaRank in Web search engines. ACM Trans. Reconfigurable Technol. Syst. 4(3): 25:1-25:19 (2011) - [c16]Tianji Wu, Di Wu, Yu Wang, Xiaorui Zhang, Hong Luo, Ningyi Xu, Huazhong Yang:
Gemma in April: A matrix-like parallel programming architecture on OpenCL. DATE 2011: 703-708 - [c15]Yu Wang
A heterogeneous accelerator platform for multi-subject voxel-based brain network analysis. ICCAD 2011: 339-344 - 2010
- [c14]Yi Shan, Bo Wang, Jing Yan, Yu Wang
FPMR: MapReduce framework on FPGA. FPGA 2010: 93-102 - [c13]Jing Yan, Ningyi Xu, Xiongfei Cai, Rui Gao, Yu Wang, Rong Luo, Feng-Hsiung Hsu:
LambdaRank acceleration for relevance ranking in web search engines (abstract only). FPGA 2010: 285 - [c12]Jing Yan, Ningyi Xu, Zenglin Xia, Rong Luo, Feng-Hsiung Hsu:
A compression method for inverted index and its FPGA-based decompression solution. FPT 2010: 261-264 - [c11]Di Wu, Tianji Wu, Yi Shan, Yu Wang
Making Human Connectome Faster: GPU Acceleration of Brain Network Analysis. ICPADS 2010: 593-600 - [c10]Tianji Wu, Bo Wang, Yi Shan, Feng Yan, Yu Wang
Efficient PageRank and SpMV Computation on AMD GPUs. ICPP 2010: 81-89 - [c9]Yi Shan, Tianji Wu, Yu Wang
FPGA and GPU implementation of large scale SpMV. SASP 2010: 64-70
2000 – 2009
- 2009
- [j2]Ningyi Xu, Xiongfei Cai, Rui Gao, Lei Zhang, Feng-Hsiung Hsu:
FPGA Acceleration of RankBoost in Web Search Engines. ACM Trans. Reconfigurable Technol. Syst. 1(4): 19:1-19:19 (2009) - [c8]Jing Yan, Rong Luo, Rui Gao, Ningyi Xu:
An Efficient Lossless Compression Method for Internet Search Data in Hardware Accelerators. CSIE (3) 2009: 453-457 - [c7]Jing Yan, Ningyi Xu, Xiongfei Cai, Rui Gao, Yu Wang
FPGA-based acceleration of neural network for ranking in web search engine with a streaming architecture. FPL 2009: 662-665 - [c6]Bo Wang
RankBoost Acceleration on both NVIDIA CUDA and ATI Stream Platforms. ICPADS 2009: 284-291 - [c5]Ji-Yong Shin
FTL design exploration in reconfigurable high-performance SSD for server applications. ICS 2009: 338-349 - [c4]Feng Yan, Ningyi Xu, Yuan (Alan) Qi:
Parallel Inference for Latent Dirichlet Allocation on Graphics Processing Units. NIPS 2009: 2134-2142 - 2008
- [c3]Zhijun Li, Ning-Yi Xu, Feng-Hsiung Hsu, Xiongfei Cai, Rui Gao, Zenglin Xia:
Distributed RankBoost Acceleration Using FPGA and MPI for Web Relevance Ranking. ICPADS 2008: 35-42 - 2007
- [c2]Ning-Yi Xu, Xiongfei Cai, Rui Gao, Lei Zhang, Feng-Hsiung Hsu:
FPGA-based Accelerator Design for RankBoost in Web Search Engines. FPT 2007: 33-40 - 2006
- [j1]Guanghui He, Ningyi Xu, Wei Yu, Zucheng Zhou:
A single receiving chip for DVB data broadcasting system. IEEE Trans. Consumer Electron. 52(3): 1084-1091 (2006) - 2005
- [c1]Ningyi Xu, Shaohua Li, Wei Yu, Guanghui He, Hao Zhang, Fei Luo, Zucheng Zhou:
The design and implementation of a DVB receiving chip with PCI interface. ASP-DAC 2005: 15-16
Coauthor Index
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