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"Sequential circuit fault simulation using logic emulation."

Shih-Arn Hwang, Jin-Hua Hong, Cheng-Wen Wu (1998)

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DOI: 10.1109/43.712103

access: closed

type: Journal Article

metadata version: 2023-09-30

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  - journals/tcad/HwangHW98
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  - https://dblp.org/rec/journals/tcad/HwangHW98
Shih-Arn Hwang, Jin-Hua Hong, Cheng-Wen Wu:
Sequential circuit fault simulation using logic emulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(8): 724-736 (1998)

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