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Publication search results
found 202 matches
- 2007
- Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jaeger, Ofer Peled:
A Framework for the Validation of Processor Architecture Compliance. DAC 2007: 902-905 - Anant Agarwal, Markus Levy:
The KILL Rule for Multicore. DAC 2007: 750-753 - Kanak Agarwal, Sani R. Nassif:
Characterizing Process Variation in Nanometer CMOS. DAC 2007: 396-399 - Giovanni Agosta
, Francesco Bruschi, Gerardo Pelosi
, Donatella Sciuto:
A Unified Approach to Canonical Form-based Boolean Matching. DAC 2007: 841-846 - Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram:
Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design. DAC 2007: 533-538 - Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro:
Optimization of Area in Digital FIR Filters using Gate-Level Metrics. DAC 2007: 420-423 - Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
:
RIJID: Random Code Injection to Mask Power Analysis based Side Channel Attacks. DAC 2007: 489-492 - Behnam Amelifard, Massoud Pedram:
Optimal Selection of Voltage Regulator Modules in a Power Delivery Network. DAC 2007: 168-173 - Nikolaos Andrikos, Luciano Lavagno, Davide Pandini, Christos P. Sotiriou:
A Fully-Automated Desynchronization Flow for Synchronous Circuits. DAC 2007: 982-985 - Francine Bacchini, Daniel D. Gajski, Laurent Maillet-Contoz, Haruhisa Kashiwagi, Jack Donovan, Tommi Mäkeläinen, Jack Greenbaum, Rishiyur S. Nikhil:
TLM: Crossing Over From Buzz To Adoption. DAC 2007: 444-445 - Francine Bacchini, Alan J. Hu, Tom Fitzpatrick, Rajeev Ranjan, David Lacey, Mercedes Tan, Andrew Piziali, Avi Ziv:
Verification Coverage: When is Enough, Enough? DAC 2007: 744-745 - Francine Bacchini, Gregory S. Spirakis, Juan Antonio Carballo, Kurt Keutzer, Aart J. de Geus, Fu-Chieh Hsu, Kazu Yamada:
Megatrends and EDA 2017. DAC 2007: 21-22 - Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil D. Dutt
, Juanjo Noguera:
Selective Band width and Resource Management in Scheduling for Dynamically Reconfigurable Architectures. DAC 2007: 771-776 - Lars Bauer, Muhammad Shafique, Simon Kramer, Jörg Henkel:
RISPP: Rotating Instruction Set Processing Platform. DAC 2007: 791-796 - Kerry Bernstein, Paul S. Andry, Jerome Cann, Philip G. Emma, David Greenberg, Wilfried Haensch, Mike Ignatowski, Steven J. Koester, John Magerlein, Ruchir Puri, Albert M. Young:
Interconnects in the Third Dimension: Design Challenges for 3D ICs. DAC 2007: 562-567 - Krishna Bharath, Ege Engin, Madhavan Swaminathan, Kazuhide Uriu, Toru Yamada:
Computationally Efficient Power Integrity Simulation for System-on-Package Applications. DAC 2007: 612-617 - Lovleen Bhatia, Jayesh Gaur, Praveen Tiwari, Raj S. Mitra, Sunil H. Matange:
Leveraging Semi-Formal and Sequential Equivalence Techniques for Multimedia SOC Performance Validation. DAC 2007: 69-74 - Bishnupriya Bhattacharya, John Rose, Stuart Swan:
Language Extensions to SystemC: Process Control Constructs. DAC 2007: 35-38 - Praveen Bhojwani, Rabi N. Mahapatra:
A Robust Protocol for Concurrent On-Line Test (COLT) of NoC-based Systems-on-a-Chip. DAC 2007: 670-675 - Alex Bobrek, JoAnn M. Paul, Donald E. Thomas:
Shared Resource Access Attributes for High-Level Contention Models. DAC 2007: 720-725 - Paul Bogdan, Radu Marculescu:
Quantum-Like Effects in Network-on-Chip Buffers Behavior. DAC 2007: 266-267 - Talal Bonny
, Jörg Henkel:
Instruction Splitting for Efficient Code Compression. DAC 2007: 646-651 - Shekhar Borkar:
Thousand Core ChipsA Technology Perspective. DAC 2007: 746-749 - Philip Brisk, Ajay Kumar Verma, Paolo Ienne, Hadi Parandeh-Afshar:
Enhancing FPGA Performance for Arithmetic Circuits. DAC 2007: 334-337 - Lawrence D. Burns:
Designing a New Automotive DNA. DAC 2007 - Steven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James W. Tschanz, Vivek De:
Comparative Analysis of Conventional and Statistical Design Techniques. DAC 2007: 238-243 - Henry H. Y. Chan, Zeljko Zilic:
Modeling Simultaneous Switching Noise-Induced Jitter for System-on-Chip Phase-Locked Loops. DAC 2007: 430-435 - Saumya Chandra, Kanishka Lahiri, Anand Raghunathan, Sujit Dey:
System-on-Chip Power Management Considering Leakage Power Variations. DAC 2007: 877-882 - Pramod Chandraiah, Rainer Dömer:
Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification. DAC 2007: 787-790 - Yuan-Hao Chang, Jen-Wei Hsieh, Tei-Wei Kuo:
Endurance Enhancement of Flash-Memory Storage, Systems: An Efficient Static Wear Leveling Design. DAC 2007: 212-217
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