• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 65 matches

• 2011
• 
  Srinivasulu Alampally, R. T. Venkatesh, Priyadharshini Shanmugasundaram, Rubin A. Parekhji, Vishwani D. Agrawal:
  An efficient test data reduction technique through dynamic pattern mixing across multiple fault models. VTS 2011: 285-290
• 
  Nader Alawadhi, Ozgur Sinanoglu:
  Revival of partial scan: Test cube analysis driven conversion of flip-flops. VTS 2011: 260-265
• 
  Nuno Alves, Yiwen Shi, Jennifer Dworak, R. Iris Bahar, Kundan Nepal:
  Enhancing online error detection through area-efficient multi-site implications. VTS 2011: 241-246
• 
  Aritra Banerjee, Shreyas Sen, Shyam Kumar Devarakond, Abhijit Chatterjee:
  Automatic test stimulus generation for accurate diagnosis of RF systems using transient response signatures. VTS 2011: 58-63
• 
  Kanad Basu, Prabhat Mishra:
  Efficient trace data compression using statically selected dictionary. VTS 2011: 14-19
• 
  Dilip K. Bhavsar:
  Harmony Widget for X-free scan testing. VTS 2011: 225-228
• 
  Kameshwar Chandrasekar, Surendra Bommu, Sanjay Sengupta:
  Low Coverage Analysis using dynamic un-testability debug in ATPG. VTS 2011: 291-296
• 
  Kyoung Youn Cho, Rajagopalan Srinivasan:
  A scan cell architecture for inter-clock at-speed delay testing. VTS 2011: 213-218
• 
  Rudrajit Datta, Nur A. Touba:
  Designing a fast and adaptive error correction scheme for increasing the lifetime of phase change memories. VTS 2011: 134-139
• 
  Sreenivas Gangadhar, Spyros Tragoudas:
  An analytical method for estimating SET propagation. VTS 2011: 197-202
• 
  Siddharth Garg, Diana Marculescu:
  Special session 4A: New topics parametric yield and reliability of 3D integrated circuits: New challenges and solutions. VTS 2011: 99
• 
  Anne Gattiker:
  Invited paper: Yin and Yang of embedded sensors for post-scaling-era. VTS 2011: 324-327
• 
  Valentin Gherman, Samuel Evain, Fabrice Auzanneau, Yannick Bonhomme:
  Programmable extended SEC-DED codes for memory errors. VTS 2011: 140-145
• 
  Julien Guilhemsang, Olivier Héron, Nicolas Ventroux, Olivier Goncalves, Alain Giulieri:
  Impact of the application activity on intermittent faults in embedded systems. VTS 2011: 191-196
• 
  Ujjwal Guin, Chen-Huan Chiang:
  Design for Bit Error Rate estimation of high speed serial links. VTS 2011: 278-283
• 
  Takushi Hashida, Yuuki Araga, Makoto Nagata:
  A diagnosis testbench of analog IP cores against on-chip environmental disturbances. VTS 2011: 70-75
• 
  Yu-Jen Huang, Jin-Fu Li, Ji-Jan Chen, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu:
  A built-in self-test scheme for the post-bond test of TSVs in 3D ICs. VTS 2011: 20-25
• 
  Eun Jung Jang, Anne E. Gattiker, Sani R. Nassif, Jacob A. Abraham:
  Efficient and product-representative timing model validation. VTS 2011: 90-95
• 
  Zhongwei Jiang, Zheng Wang, Jing Wang, D. M. H. Walker:
  Levelized low cost delay test compaction considering IR-drop induced power supply noise. VTS 2011: 52-57
• 
  Kee Sup Kim, Rob Roy:
  Apprentice - VTS edition: Season 4. VTS 2011: 113
• 
  Mike Laisne:
  Advanced methods for leveraging new test standards. VTS 2011: 97
• 
  Dongsoo Lee, Sang Phill Park, Ashish Goel, Kaushik Roy:
  Memory-based embedded digital ATE. VTS 2011: 266-271
• 
  Jia Li, Yu Huang, Dong Xiang:
  Prediction of compression bound and optimization of compression architecture for linear decompression-based schemes. VTS 2011: 297-302
• 
  W.-A. Lin, C.-C. Lee, J.-L. Huang:
  Sigma-delta modulation based wafer-level testing for TFT-LCD source driver ICs. VTS 2011: 315-320
• 
  Junxia Ma, Nisar Ahmed, Mohammad Tehranipoor:
  Low-cost diagnostic pattern generation and evaluation procedures for noise-related failures. VTS 2011: 309-314
• 
  Amitava Majumdar, Arani Sinha, Nehal Patel, Ramamurthy Setty, Yan Dong, Shu-Hsuan Chou:
  A Novel mechanism for speed characterization during delay test. VTS 2011: 116-121
• 
  Michail Maniatakos, Yiorgos Makris, Prabhakar Kudva, Bruce M. Fleischer:
  Exponent monitoring for low-cost concurrent error detection in FPU control logic. VTS 2011: 235-240
• 
  Celestino V. Martins, Jorge Semião, Julio César Vázquez, Víctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
  Adaptive Error-Prediction Flip-flop for performance failure prediction with aging sensors. VTS 2011: 203-208
• 
  Jesús Moreno, Víctor H. Champac, Michel Renovell:
  A new methodology for realistic open defect detection probability evaluation under process variations. VTS 2011: 184-189
• 
  Prakash Narayanan, Rajesh Mittal, Sumanth Poddutur, Vivek Singhal, Puneet Sabbarwal:
  Modified flip-flop architecture to reduce hold buffers and peak power during scan shift operation. VTS 2011: 154-159

skipping 35 more matches