• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 418 matches

• 2023
• 
  Keren Zhu, Hao Chen, Mingjie Liu, David Z. Pan:
  Hierarchical Analog and Mixed-Signal Circuit Placement Considering System Signal Flow. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(8): 2689-2702 (2023)
• 
  Behrooz Abdoli, Saeed Safari:
  A Hardware-Friendly Real-Time Implementation of the Auditory Attention Based on a Novel Spiking Winner-Take-All Network. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(8): 2566-2579 (2023)
• 
  Zain Ul Abideen, Tiago Diadami Perez, Mayler G. A. Martins, Samuel Pagliarini:
  A Security-Aware and LUT-Based CAD Flow for the Physical Synthesis of hASICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(10): 3157-3170 (2023)
• 
  Nithin Thomas Abraham, Gajendranath Chowdary, Dhanaraj Kakkanattu Jagalchandran:
  State Separate Modular Modeling Methodology of Multioutput DC-DC Converters. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(3): 968-977 (2023)
• 
  Lomash Chandra Acharya, Arvind Kumar Sharma, Neeraj Mishra, Khoirom Johnson Singh, Mahipal Dargupally, Nayakanti Sai Shabarish, Ajoy Mandal, Venkatraman Ramakrishnan, Sudeb Dasgupta, Anand Bulusu:
  Aging-Aware Timing Model of CMOS Inverter: Path Level Timing Performance and Its Impact on the Logical Effort. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(8): 2657-2663 (2023)
• 
  Anthony Agnesina, Kyungwook Chang, Sung Kyu Lim:
  Parameter Optimization of VLSI Placement Through Deep Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1295-1308 (2023)
• 
  Soyed Tuhin Ahmed, Michael Hefenbrock, Christopher Münch, Mehdi B. Tahoori:
  NeuroScrub+: Mitigating Retention Faults Using Flexible Approximate Scrubbing in Neuromorphic Fabric Based on Resistive Memories. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(5): 1490-1503 (2023)
• 
  Irina Alam, Tianmu Li, Sean Brock, Puneet Gupta:
  DRDebug: Automated Design Rule Debugging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 606-615 (2023)
• 
  Lorena Anghel, Riccardo Cantoro, Riccardo Masante, Michele Portolan, Sandro Sartoni, Matteo Sonza Reorda:
  Self-Test Library Generation for In-Field Test of Path Delay Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4246-4259 (2023)
• 
  Giorgos Armeniakos, Georgios Zervakis, Dimitrios Soudris, Mehdi B. Tahoori, Jörg Henkel:
  Model-to-Circuit Cross-Approximation For Printed Machine Learning Classifiers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3532-3544 (2023)
• 
  Aman Arora, Andrew Boutros, Seyed Alireza Damghani, Karan Mathur, Vedant Mohanty, Tanmay Anand, Mohamed A. Elgammal, Kenneth B. Kent, Vaughn Betz, Lizy K. John:
  Koios 2.0: Open-Source Deep Learning Benchmarks for FPGA Architecture and CAD Research. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3895-3909 (2023)
• 
  Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu:
  A Novel Low-Power Compression Scheme for Systolic Array-Based Deep Learning Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1085-1098 (2023)
• 
  Sercan Aygun, M. Hassan Najafi, Mohsen Imani, Ece Olcay Günes:
  Agile Simulation of Stochastic Computing Image Processing With Contingency Tables. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(10): 3474-3478 (2023)
• 
  Azat Azamat, Faaiz Asim, Jintae Kim, Jongeun Lee:
  Partial Sum Quantization for Reducing ADC Size in ReRAM-Based Neural Network Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4897-4908 (2023)
• 
  Zhenyu Bai, Hugues Cassé, Thomas Carle, Christine Rochange:
  Computing Execution Times With Execution Decision Diagrams in the Presence of Out-of-Order Resources. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3665-3678 (2023)
• 
  Shuhan Bai, Hu Wan, Yun Huang, Xuan Sun, Fei Wu, Changsheng Xie, Hung-Chih Hsieh, Tei-Wei Kuo, Chun Jason Xue:
  Pipette: Efficient Fine-Grained Reads for SSDs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4721-4734 (2023)
• 
  Md Faizul Bari, Baibhab Chatterjee, Lucas Duncan, Shreyas Sen:
  RF-PSF: A CNN-Based Process Distinction Method Using Inadvertent RF Signatures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4233-4245 (2023)
• 
  Philippe-Olivier Beaulieu, Etienne Dumesnil, Frederic Nabki, Mounir Boukadoum:
  Analog RF Circuit Sizing by a Cascade of Shallow Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4391-4401 (2023)
• 
  Nicolò Bellarmino, Riccardo Cantoro, Martin Huch, Tobias Kilian, Raffaele Martone, Ulf Schlichtmann, Giovanni Squillero:
  A Multilabel Active Learning Framework for Microcontroller Performance Screening. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(10): 3436-3449 (2023)
• 
  Anna Bernasconi, Alessandro Berti, Valentina Ciriani, Gianna M. Del Corso, Innocenzo Fulginiti:
  XOR-AND-XOR Logic Forms for Autosymmetric Functions and Applications to Quantum Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(6): 1861-1872 (2023)
• 
  Aritra Bhattacharyay, Shuo Yang, Jonathan Cruz, Prabuddha Chakraborty, Swarup Bhunia, Tamzidul Hoque:
  An Automated Framework for Board-Level Trojan Benchmarking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 397-410 (2023)
• 
  Lukas Burgholzer, Alexander Ploier, Robert Wille:
  Simulation Paths for Quantum Circuit Simulation With Decision Diagrams What to Learn From Tensor Networks, and What Not. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1113-1122 (2023)
• 
  Peng Cao, Guoqing He, Tai Yang:
  TF-Predictor: Transformer-Based Prerouting Path Delay Prediction Framework. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2227-2237 (2023)
• 
  Zhuomin Chai, Yuxiang Zhao, Wei Liu, Yibo Lin, Runsheng Wang, Ru Huang:
  CircuitNet: An Open-Source Dataset for Machine Learning in VLSI CAD Applications With Improved Domain-Specific Evaluation Metric and Learning Strategies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 5034-5047 (2023)
• 
  Avijit Chakraborty, Duncan M. Hank Walker:
  Topological Heuristics for Scan Test Overhead Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(6): 2043-2054 (2023)
• 
  Thomas Chamelot, Damien Couroussé, Karine Heydemann:
  MAFIA: Protecting the Microarchitecture of Embedded Systems Against Fault Injection Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4555-4568 (2023)
• 
  Alex Chan, Danil Sokolov, Victor Khomenko, David Lloyd, Alex Yakovlev:
  Burst Automaton: Framework for Speed-Independent Synthesis Using Burst-Mode Specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(5): 1560-1573 (2023)
• 
  Anupam Chattopadhyay, Debjyoti Bhattacharjee, Subhamoy Maitra:
  Improved Linear Decomposition of Majority and Threshold Boolean Functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3951-3957 (2023)
• 
  Jayeeta Chaudhuri, Krishnendu Chakrabarty:
  Diagnosis of Malicious Bitstreams in Cloud Computing FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3651-3664 (2023)
• 
  Kejun Chen, Orlando Arias, Xiaolong Guo, Qingxu Deng, Yier Jin:
  IP-Tag: Tag-Based Runtime 3PIP Hardware Trojan Detection in SoC Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 68-81 (2023)

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