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  • Xi'an Jiaotong University
  • No. 28 Xianning West Road, Xi'an, Shaanxi Province, China.
  • 20:48 (UTC -12:00)

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  1. ConSci-v1.0 ConSci-v1.0 Public

    Forked from xjtuAccel999/ConSci-v1.0

    C++

  2. AXI_crossbar AXI_crossbar Public

    AXI_crossbar_3M_3S

    Verilog

  3. vortex-2.2 vortex-2.2 Public

    Verilog

  4. cva6 cva6 Public

    Forked from openhwgroup/cva6

    The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

    Assembly

  5. FlooNoC FlooNoC Public

    Forked from pulp-platform/FlooNoC

    A Fast, Low-Overhead On-chip Network

    SystemVerilog

  6. uvm_tb_gen uvm_tb_gen Public

    Forked from brentwang-lab/uvm_tb_gen

    This is for uvm_tb_gen

    SystemVerilog