Phone: +92 3035006484
Email: ali.bashir1947@gmail.com
LinkedIn: LinkedIn Profile
Chip Design Trainee Engineer
Learning Basics of:
- Linux and Bash
- Git and GitHub
- C language
- RISC-V
- DLD & DSD
- Computer Architecture
- Advanced Training on Chip Design using CADENCE Design Tools
- 06 weeks’ internship to understand their infrastructure and telecommunication through implementing knowledge into practical approach.
Implementation of 16-bit ALU on CADENCE EDA (BSc Electronic Engineering FYP)
- From RTL To GDS flow.
- To analyze and determine in what ways CADENCE provides a better platform for optimization of the produced design.
Soft Skills: Teamwork
Technical Skills: Linux, C/C++, MATLAB, MS Office, Latex, and Verilog
- BSc Electronic Engineering
The Islamia University of Bahawalpur
Session: 2019-2023