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🖥️
everything is computer
🖥️
everything is computer

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matthewychen/README.md
  • 👋 Hi, I’m @matthewychen, a first-year Electrical Engineering student @uwaterloo
  • Current interests include hardware design and simulation with Verilog and ML

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  1. ThetaCore ThetaCore Public

    RISC-V CPU ISA architecture implemented from scratch.

    SystemVerilog 2 1

  2. Irishumanoid/Non-Trivial-NC-Testing Irishumanoid/Non-Trivial-NC-Testing Public

    Simulations for our NC for Smart Cities project

    Jupyter Notebook

  3. hackpadsubmission hackpadsubmission Public

    Forked from hackclub/hackpad

    Ground-Up Keyboard w/ KiCAD, Fusion360, and QMK firmware

    Python